- 23 12月, 2013 1 次提交
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由 Jonas Jensen 提交于
The MOXA ART SoC is based on Faraday's FA526. This is a ARMv4 32-bit 192 MHz CPU with MMU and 16KB/8KB D/I-cache. Add platform support for this SoC. Also add UC-7112-LX as a machine. Signed-off-by: NJonas Jensen <jonas.jensen@gmail.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 17 12月, 2013 7 次提交
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由 WingMan Kwok 提交于
Enable the USB support (Host mode only) on TI's Keystone platform. It also enables the support of usb mass storage, FAT and Ext4 filesystems to test rootfs mount over an USB disk. Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NWingMan Kwok <w-kwok2@ti.com>
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由 Santosh Shilimkar 提交于
With commit 4178bac4 {ARM: call of_clk_init from default time_init handler}, of_clk_init() is always called on machines using default time_init handler. So drop the of_clk_init() from keystone code to avoid below boot errors because of double call. _of_pll_clk_init: error initializing pll mainpllclk _of_pll_clk_init: error initializing pll papllclk _of_pll_clk_init: error initializing pll ddr3apllclk _of_pll_clk_init: error initializing pll ddr3bpllclk _of_pll_clk_init: error initializing pll armpllclk Reported-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
Keystone PM bus makes use of generic PM clock core backend. Since generic PM clock core uses platform bus notifiers to track events like ADD_DEVICE/DEL_DEVICE and to fill clock lists per each device, we need to initialise Keystone PM domains before the platform devices have been created. Hence, fix it by moving keystone_pm_runtime_init() before platform devices have been populated. Reported-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
Keystone II peripheral devices support 32-bit DMA and hence can access only first 2GB of the memory address space. So set the platform dma_zone_size to handle that case. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Taras Kondratiuk 提交于
Keystone code is big endian compatible, so mark it as one that supports big endian. Note this patch just allows to select Big endian build for ARCH_KEYSTONE, but it does not enable BE by default. Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
There are still some missing parts (e.g. board support, device trees), but with these bits added on top of this patch I can successfully boot a EFM32GG-DK3750 board that uses an EFM32GG990F1024. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 14 12月, 2013 1 次提交
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由 Russell King 提交于
Jason Gunthorpe reports a build failure when ARM_PATCH_PHYS_VIRT is not defined: In file included from arch/arm/include/asm/page.h:163:0, from include/linux/mm_types.h:16, from include/linux/sched.h:24, from arch/arm/kernel/asm-offsets.c:13: arch/arm/include/asm/memory.h: In function '__virt_to_phys': arch/arm/include/asm/memory.h:244:40: error: 'PHYS_OFFSET' undeclared (first use in this function) arch/arm/include/asm/memory.h:244:40: note: each undeclared identifier is reported only once for each function it appears in arch/arm/include/asm/memory.h: In function '__phys_to_virt': arch/arm/include/asm/memory.h:249:13: error: 'PHYS_OFFSET' undeclared (first use in this function) Fixes: ca5a45c0 ("ARM: mm: use phys_addr_t appropriately in p2v and v2p conversions") Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 12月, 2013 5 次提交
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由 Sebastian Hesselbarth 提交于
This adds initial support for the Marvell Berlin SoC family with Armada 1500 (88DE3100) and Armada 1500-mini (88DE3005) SoCs. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: NJason Cooper <jason@lakedaemon.net> Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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由 Sebastian Hesselbarth 提交于
This adds very basic device tree files for the Marvell Armada 1500-mini SoC (Berlin BG2CD) and the Google Chromecast. Currently, SoC only has nodes for cpu, some clocks, l2 cache controller, local timer, apb timers, uart, and interrupt controllers. The Google Chromecast is a consumer device comprising the Armada 1500-mini SoC above. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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由 Sebastian Hesselbarth 提交于
This adds very basic device tree files for the Marvell Armada 1500 SoC (Berlin BG2) and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for cpus, some clocks, l2 cache controller, local timer, apb timers, uart, and interrupt controllers. The Sony NSZ-GS7 is a GoogleTV consumer device comprising the Armada 1500 SoC above. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: NJason Cooper <jason@lakedaemon.net> Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NJisheng Zhang <jszhang@marvell.com>
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由 Sebastian Hesselbarth 提交于
This adds UART0 as found on Marvell 88DE3xxx SoCs, e.g. Armada 1500 to the list of possible lowlevel debug options. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: NJason Cooper <jason@lakedaemon.net> Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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由 Sebastian Hesselbarth 提交于
This adds the Marvell Berlin SoC family, Marvell Armada 1500 (BG2), and Marvell Armada 1500-mini (BG2CD) to the multi_v7_defconfig. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: NJason Cooper <jason@lakedaemon.net> Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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- 12 12月, 2013 5 次提交
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由 Maxime Ripard 提交于
The Allwinner A31 uses the ARM GIC as its internal interrupts controller. The GIC can work on several interrupt triggers, and the A31 was actually setting it up to use a rising edge as a trigger, while it was actually a level high trigger, leading to some interrupts that would be completely ignored if the edge was missed. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Cc: stable@vger.kernel.org # 3.12+ Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Maxime Ripard 提交于
The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The GIC can work on several interrupt triggers, and the A20 was actually setting it up to use a rising edge as a trigger, while it was actually a level high trigger, leading to some interrupts that would be completely ignored if the edge was missed. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NHans de Goede <hdegoede@redhat.com> Cc: stable@vger.kernel.org #3.12+ Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Add a missing break to the switch in tegra_init_fuse() which determines which SoC the code is running on. This prevents the Tegra30+ fuse handling code from running on Tegra20. Fixes: 3bd1ae57 ("ARM: tegra: add fuses as device randomness") Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Sergei Ianovich 提交于
Erratum 71 of PXA270M Processor Family Specification Update (April 19, 2010) explains that watchdog reset time is just 8us insead of 10ms in EMTS. If SDRAM is not reset, it causes memory bus congestion and the device hangs. We put SDRAM in selfresh mode before watchdog reset, removing potential freezes. Without this patch PXA270-based ICP DAS LP-8x4x hangs after up to 40 reboots. With this patch it has successfully rebooted 500 times. Signed-off-by: NSergei Ianovich <ynvich@gmail.com> Tested-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Dmitry Eremin-Solenikov 提交于
When converting from tosa-keyboard driver to matrix keyboard, tosa keys received extra 1 column shift. Replace that with correct values to make keyboard work again. Fixes: f69a6548 ('[ARM] pxa/tosa: make use of the matrix keypad driver') Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 11 12月, 2013 2 次提交
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由 Josh Wu 提交于
The SAMA5D36 chip is the superset product of SAMA5D3x family. For detail information please refer to: http://www.atmel.com/Microsite/sama5d3/default.aspxSigned-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Nishanth Menon 提交于
Due to the cross dependencies between hwmod for automanaged device information for OMAP and dts node definitions, we can run into scenarios where the dts node is defined, however it's hwmod entry is yet to be added. In these cases: a) omap_device does not register a pm_domain (since it cannot find hwmod entry). b) driver does not know about (a), does a pm_runtime_get_sync which never fails c) It then tries to do some operation on the device (such as read the revision register (as part of probe) without clock or adequate OMAP generic PM operation performed for enabling the module. This causes a crash such as that reported in: https://bugzilla.kernel.org/show_bug.cgi?id=66441 When 'ti,hwmod' is provided in dt node, it is expected that the device will not function without the OMAP's power automanagement. Hence, when we hit a fail condition (due to hwmod entries not present or other similar scenario), fail at pm_domain level due to lack of data, provide enough information for it to be fixed, however, it allows for the driver to take appropriate measures to prevent crash. Reported-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: NNishanth Menon <nm@ti.com> Acked-by: NKevin Hilman <khilman@linaro.org> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 10 12月, 2013 19 次提交
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由 Simon Horman 提交于
Based on work for the r8a7778 SoC by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Since ("ARM: shmobile: Remove legacy KZM9D board code") It is now necessary for AUTO_ZRELADDR to be selected in order for the kernel to build with kzm9d_defconfig. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro for a long term. But in these days, the ICK clock is defined in random place. This patch arranges it. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
I2C clock is based on P clock, not HP clock Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
EXTAL clock frequency needs 1/2 when (MD14, MD13, MD19) = (1, x, x). Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add the r8a7791 thermal device as legacy clocks. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add a thermal platform device for the legacy case on the r8a7791 SoC. This keeps the r8a7791 in sync with the r8a7790 sister device. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add the r8a7790 DT thermal device to the legacy clocks. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
SH-Mobile platforms are transitioning from non-multiplatform to multiplatform kernel. A new ARCH_SHMOBILE_MULTI configuration symbol has been created to group all multiplatform-enabled SH-Mobile SoCs. The existing ARCH_SHMOBILE configuration symbol groups SoCs that haven't been converted yet. This arrangement works fine for the arch/ code, but lots of drivers needed on both ARCH_SHMOBILE and ARCH_SHMOBILE_MULTI depend on ARCH_SHMOBILE only. In order to avoid changing them, rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY, and create a new boolean ARCH_SHMOBILE configuration symbol that is selected by both ARCH_SHMOBILE_LEGACY and ARCH_SHMOBILE_MULTI. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The ZX parent clock isn't implemented yet, add it as well. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Jon Medhurst 提交于
The __do_cache_op function operates with a 'chunk' size of one page but fails to limit the size of the final chunk so as to not exceed the specified memory region. Fix this. Cc: <stable@vger.kernel.org> Reported-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Tested-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NJon Medhurst <tixy@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Konstantin Khlebnikov 提交于
This patch fixes corner case when (fp + 4) overflows unsigned long, for example: fp = 0xFFFFFFFF -> fp + 4 == 3. Cc: <stable@vger.kernel.org> Signed-off-by: NKonstantin Khlebnikov <k.khlebnikov@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Konstantin Khlebnikov 提交于
get_wchan() is lockless. Task may wakeup at any time and change its own stack, thus each next stack frame may be overwritten and filled with random stuff. /proc/$pid/stack interface had been disabled for non-current tasks, see [1] But 'wchan' still allows to trigger stack frame unwinding on volatile stack. This patch fixes oops in unwind_frame() by adding stack pointer validation on each step (as x86 code do), unwind_frame() already checks frame pointer. Also I've found another report of this oops on stackoverflow (irony). Link: http://www.spinics.net/lists/arm-kernel/msg110589.html [1] Link: http://stackoverflow.com/questions/18479894/unwind-frame-cause-a-kernel-paging-error Cc: <stable@vger.kernel.org> Signed-off-by: NKonstantin Khlebnikov <k.khlebnikov@samsung.com> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Santosh Shilimkar 提交于
To get updated __pv_phys_offset, setup_dma_zone() needs to be called after early_paging_init(). Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Santosh Shilimkar 提交于
Current code is using PHYS_OFFSET to calculate the arm_dma_limit which will lead to wrong calculations in cases where PHYS_OFFSET is updated runtime. So fix the code by using __pv_phys_offset instead of PHYS_OFFSET. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Peter reports that OMAP audio broke with the recent fix for these checks, caused by OMAP audio using a 64-bit DMA mask. We should allow 64-bit DMA masks even with 32-bit dma_addr_t if we can be sure the amount of RAM we have won't allow the 32-bit dma_addr_t to overflow. Unfortunately, the checks to detect overflow were not correct. Tested-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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