1. 14 6月, 2017 1 次提交
  2. 28 6月, 2016 2 次提交
  3. 28 4月, 2016 1 次提交
    • J
      clocksource/drivers/mtk_timer: Add __init attribute · d98eddf8
      Julia Lawall 提交于
      Add __init attribute on a function that is only called from other __init
      functions and that is not inlined, at least with gcc version 4.8.4 on an
      x86 machine with allyesconfig.  Currently, the function is put in the
      .text.unlikely segment.  Declaring it as __init will cause it to be put in
      the .init.text and to disappear after initialization.
      
      The result of objdump -x on the function before the change is as follows:
      
      0000000000000000 l     F .text.unlikely 000000000000006f mtk_timer_setup.isra.4
      
      And after the change it is as follows:
      
      0000000000000000 l     F .init.text	000000000000006a mtk_timer_setup.isra.4
      
      Done with the help of Coccinelle.  The semantic patch checks for local
      static non-init functions that are called from an __init function and are
      not called from any other function.
      Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
      Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
      Acked-by: NMatthias Brugger <matthias.bgg@gmail.com>
      d98eddf8
  4. 15 12月, 2015 3 次提交
  5. 15 10月, 2015 2 次提交
  6. 10 8月, 2015 1 次提交
  7. 25 2月, 2015 1 次提交
  8. 23 7月, 2014 1 次提交
    • M
      clocksource: Add support for the Mediatek SoCs · ecb3530d
      Matthias Brugger 提交于
      This patch adds a clock source and clock event for the timer found
      on the Mediatek SoCs.
      
      The Mediatek General Purpose Timer block provides five 32 bit timers and
      one 64 bit timer.
      
      Two 32 bit timers are used by this driver:
      TIMER1: clock events supporting periodic and oneshot events
      TIMER2: clock source configured as a free running counter
      
      The General Purpose Timer block can be run with two clocks. A 13 MHz system
      clock and the RTC clock running at 32 KHz. This implementation uses the system
      clock with no clock source divider.
      
      The interrupts are shared between the different timers and have to be read back
      from a register. We just enable one interrupt for the clock event. The clock
      event timer is used by all cores.
      Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com>
      Acked-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
      ecb3530d