- 16 3月, 2015 2 次提交
-
-
由 Arseny Solokha 提交于
Drop planetcore_set_serial_speed() which had no users since its inception in commit fec60470 ("[POWERPC] bootwrapper: Add PlanetCore firmware support") in 2007. Signed-off-by: NArseny Solokha <asolokha@kb.kras.ru> Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
-
由 Michal Marek 提交于
The $(image-n) variable will never exist, because unset Kconfig options are '' and not 'n'. Signed-off-by: NMichal Marek <mmarek@suse.cz> Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
-
- 30 1月, 2015 6 次提交
-
-
由 Alessio Igor Bogani 提交于
Fix the GPIO address in the device tree to match the documented location. Signed-off-by: NAlessio Igor Bogani <alessio.bogani@elettra.eu> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Kumar Gala 提交于
Change-Id: I16e63db731e55a3d60d4e147573c1af8718082d3 Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NGeoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: NHai-Ying Wang <Haiying.Wang@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NGeoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: NHai-Ying Wang <Haiying.Wang@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Alessio Igor Bogani 提交于
Add support for the Artesyn MVME2500 Single Board Computer. The MVME2500 is a 6U form factor VME64 computer with: - A single Freescale QorIQ P2010 CPU - 1 GB of DDR3 onboard memory - Three Gigabit Ethernets - Five 16550 compatible UARTS - One USB 2.0 port, one SHDC socket and one SATA connector - One PCI/PCI eXpress Mezzanine Card (PMC/XMC) Slot - MultiProcessor Interrupt Controller (MPIC) - A DS1375T Real Time Clock (RTC) and 512 KB of Non-Volatile Memory - Two 64 KB EEPROMs - U-Boot in 16 SPI Flash This patch is based on linux-3.18 and has been boot tested. Signed-off-by: NAlessio Igor Bogani <alessio.bogani@elettra.eu> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Scott Wood 提交于
Commit 746c9e9f "of/base: Fix PowerPC address parsing hack" limited the applicability of the workaround whereby a missing ranges is treated as an empty ranges. This workaround was hiding a bug in the etsec2 device tree nodes, which have children with reg, but did not have ranges. Signed-off-by: NScott Wood <scottwood@freescale.com> Reported-by: NAlexander Graf <agraf@suse.de>
-
由 Emil Medve 提交于
Probably we should have not upstreamed this in the first place Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 10 11月, 2014 1 次提交
-
-
由 Simon Kagstrom 提交于
On some platforms a 5 second timeout during boot might be quite long, so make it configurable. Run the loop at least once to let the user stop the boot by holding a key pressed. If the timeout is set to 0, don't wait for input, which can be used as a workaround if the boot hangs on random data coming in on the serial port. Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net> [mpe: Changelog wording & whitespace] Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
-
- 08 11月, 2014 5 次提交
-
-
由 Emil Medve 提交于
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com> Change-Id: If76cd705a01813abe53396c1486bc13c4289ee92 Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Emil Medve 提交于
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com> Change-Id: I25ce24a25862b4ca460164159867abefe00ccdd1 Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Hongtao Jia 提交于
Including: P3041DS P5020DS P5040DS B4QDS Signed-off-by: NJia Hongtao <hongtao.jia@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Hongtao Jia 提交于
Including: T104xRDB T208xQDS B4QDS Signed-off-by: NJia Hongtao <hongtao.jia@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Ashish Kumar 提交于
* Run "mtdparts default" on u-boot to create dynamic partitions * Or use dynamic mtd partition with the help of bootargs in u-boot Append bootargs with: "mtdparts=ff800000.flash:1m(nand_uboot),512K(nand_dtb),8m(nand_kernel),-(fs);\ spiff707000.0:1m(spi_uboot),4m(spi_kernel),512k(spi_dtb),-(fs)'" Signed-off-by: NAshish Kumar <Ashish.Kumar@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 25 9月, 2014 1 次提交
-
-
由 Tony Breeds 提交于
in commit 29f1aff2 (powerpc: Copy bootable images in the default install script) we changed to copying all the built boot targets based on the assumption that it's backwards compatible. It turns out that debian devived installkernel scripts will barf if not given exactly 4 args. This change reverts make install to just install the vmlinux (we can change the dfault in a seperate patch) and introduces a new make zInstall which works with a more flexible installkernel script. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
-
- 17 9月, 2014 1 次提交
-
-
由 Nikhil Badola 提交于
Change USB controller version to 2.5 in compatible string for T2080/T2081 Signed-off-by: NNikhil Badola <nikhil.badola@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 10 9月, 2014 2 次提交
-
-
由 Priyanka Jain 提交于
T1042RDB_PI is Freescale Reference Design Board supporting the T1042 QorIQ Power Architecture™ processor. T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit. The board is designed with low power features targeted for Printing Image Market. T1042RDB_PI is similar to T1040RDB board with few differences like it has video interface, supports T1042 personality only T1042RDB_PI board Overview ----------------------- - SERDES Connections, 8 lanes supporting: - PCI - SATA 2.0 - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Device connected: EEPROM, thermal monitor, VID controller, RTC - Other IO - Two Serial ports - ProfiBus port Add support for T1042RDB_PI board: -add device tree -Add entry in corenet_generic.c, as it is similar to other corenet platforms Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Priyanka Jain 提交于
T1040/T1042RDB is Freescale Reference Design Board. The board can support both T1040/T1042 QorIQ Power Architecture™ processor. T1040/T1042RDB board Overview ----------------------- - SERDES Connections, 8 lanes supporting: - PCI - SGMII - QSGMII - SATA 2.0 - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Devices connected: EEPROM, thermal monitor, VID controller - Other IO - Two Serial ports - ProfiBus port Add support for T1040/T1042 RDB board: -add device tree -add entry in Kconfig to build -Add entry in corenet_generic.c, as it is similar to other corenet platforms Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 04 9月, 2014 1 次提交
-
-
由 Nikhil Badola 提交于
Change USB controller version to 2.5 in compatible string for T4240 Signed-off-by: NNikhil Badola <nikhil.badola@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 26 8月, 2014 1 次提交
-
-
由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: NJiri Kosina <jkosina@suse.cz>
-
- 13 8月, 2014 1 次提交
-
-
由 Benjamin Herrenschmidt 提交于
Avoids this warning: arch/powerpc/boot/gunzip_util.c:118:9: warning: comparison of distinct pointer types lacks a cast Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
- 05 8月, 2014 1 次提交
-
-
由 Lucas Tanure 提交于
Fix wrong __IO_H definition in boot/io.h Reported-by: NFernando Silveira <fsilveira@gmail.com> Signed-off-by: NLucas Tanure <tanure@linux.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
-
- 31 7月, 2014 1 次提交
-
-
由 Shengzhou Liu 提交于
T2080PCIe-RDB is a Freescale Reference Design Board that hosts T2080 SoC. The board feature overview: Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz DDR Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP devices - 72bit 4GB DDR3-LP SODIMM in slot Ethernet interfaces: - Two 1Gbps RGMII ports on-board - Two 10Gbps SFP+ ports on-board - Two 10Gbps Base-T ports on-board Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC IFC/Local Bus - NOR: 128MB 16-bit NOR flash - NAND: 1GB 8-bit NAND flash - CPLD: for system controlling with programable header on-board eSPI: - 64MB N25Q512 SPI flash USB: - Two USB2.0 ports with internal PHY (both Type-A) PCIe: - One PCIe x4 goldfinger(support SR-IOV) - One PCIe x4 slot - One PCIe x2 end-point device (C293 crypto co-processor) SATA: - Two SATA 2.0 ports on-board SDHC: - support a MicroSD/TF card on-board I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 26 7月, 2014 1 次提交
-
-
由 Alexander Popov 提交于
Register the controller for device tree based lookup of DMA channels (non-fatal for backwards compatibility with older device trees) and provide the '#dma-cells' property in the shared mpc5121.dtsi file Signed-off-by: NAlexander Popov <a13xp0p0v88@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
-
- 08 7月, 2014 1 次提交
-
-
由 Nitesh Narayan Lal 提交于
The driver is compatible with SEC version 4.0, which was missing from device tree resulting that the caam driver doesn't gets probed. Since SEC is backward compatible with older versions, so this patch adds those missing versions in c29x device tree. Signed-off-by: NNitesh Narayan Lal <b44382@freescale.com> Signed-off-by: NVakul Garg <b16394@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
-
- 03 7月, 2014 2 次提交
-
-
由 Shengzhou Liu 提交于
Add support for Freescale T2080/T2081 QDS Development System Board. The T2080QDS Development System is a high-performance computing, evaluation, and development platform that supports T2080 QorIQ Power Architecture processor, with following major features: T2080QDS feature overview: Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP - Dual DIMM slots up 2133MT/s with ECC Ethernet interfaces: - Two 1Gbps RGMII on-board ports - Four 10Gbps XFI on-board cages - 1Gbps/2.5Gbps SGMII Riser card - 10Gbps XAUI Riser card Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes: - 16 lanes up to 10.3125GHz - Supports Aurora debug, PEX, SATA, SGMII, sRIO, HiGig, XFI and XAUI IFC: - 128MB NOR Flash, 512MB NAND Flash, PromJet debug port and FPGA eSPI: - Three SPI flash (16MB N25Q128A + 8MB EN25S64 + 512KB SST25WF040) USB: - Two USB2.0 ports with internal PHY (one Type-A + one micro Type-AB) PCIE: - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0, SR-IOV) SATA: - Two SATA 2.0 ports on-board SRIO: - Two Serial RapidIO 2.0 ports up to 5 GHz eSDHC: - Supports SD/MMC/eMMC Card DMA: - Three 8-channels DMA controllers I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports System Logic: - QIXIS-II FPGA system controll T2081QDS board shares the same PCB with T1040QDS with some differences. Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Shengzhou Liu 提交于
The T2080 QorIQ multicore processor combines four dual-threaded e6500 Power Architecture processor cores with high-performance datapath acceleration logic and network and peripheral bus interfaces required for networking, telecom/datacom, wireless infrastructure, and mil/aerospace applications. The T2080 SoC includes the following function and features: - Four dual-threaded 64-bit Power architecture e6500 cores, up to 1.8GHz - 2MB L2 cache and 512KB CoreNet platform cache (CPC) - Hierarchical interconnect fabric - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving - Data Path Acceleration Architecture (DPAA) incorporating acceleration - 16 SerDes lanes up to 10.3125 GHz - 8 Ethernet interfaces (multiple 1G/2.5G/10G MACs) - High-speed peripheral interfaces - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0) - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz - Additional peripheral interfaces - Two serial ATA (SATA 2.0) controllers - Two high-speed USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/SDXC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Three eight-channel DMA engines - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 T2081 is a reduced personality of T2080 with following difference: Feature T2080 T2081 1G Ethernet numbers: 8 6 10G Ethernet numbers: 4 2 SerDes lanes: 16 8 Serial RapidIO,RMan: 2 no SATA Controller: 2 no Aurora: yes no SoC Package: 896-pins 780-pins Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com> [scottwood@freescale.com: added fsl,qoriq-pci-v3.0 for U-Boot compat] Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 26 6月, 2014 1 次提交
-
-
由 Chunhe Lan 提交于
T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: NChunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 21 6月, 2014 2 次提交
-
-
由 Valentin Longchamp 提交于
The mux2 node is missing the clock-output-names field that is required by the clk-ppc-corenet driver. Signed-off-by: NValentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Chunhe Lan 提交于
T4240 has a third DMA engine controller, so add the corresponding DMA node into the dts file. Signed-off-by: NChunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: reword commit message] Signed-off-by: NScott Wood <scottwood@freescale.com>
-
- 12 6月, 2014 1 次提交
-
-
由 Michal Marek 提交于
The rule to create the final images uses a zImage.% pattern. Unfortunately, this also matches the names of the zImage.*.lds linker scripts, which appear as a dependency of the final images. This somehow worked when $(srctree) used to be an absolute path, but now the pattern matches too much. List only the images from $(image-y) as the target of the rule, to avoid the circular dependency. Reported-and-tested-by: NMike Qiu <qiudayu@linux.vnet.ibm.com> Signed-off-by: NMichal Marek <mmarek@suse.cz>
-
- 23 5月, 2014 9 次提交
-
-
由 Scott Wood 提交于
Signed-off-by: NScott Wood <scottwood@freescale.com> Cc: Diana Craciun <diana.craciun@freescale.com>
-
由 harninder rai 提交于
- BSC9132 is an integrated device that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 technologies with MAPLE-B2F baseband acceleration processing elements - BSC9132QDS Overview 2Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 128Mbyte 2K page size NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory SD slot eTSEC1: Connected to SGMII PHY eTSEC2: Connected to SGMII PHY DUART interface: supports one UARTs up to 115200 bps for console display Signed-off-by: NHarninder Rai <harninder.rai@freescale.com> Signed-off-by: NRuchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Lijun Pan 提交于
P1023RDS is no longer supported/manufactured by Freescale while P1023RDB is. Signed-off-by: NLijun Pan <Lijun.Pan@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Prabhakar Kushwaha 提交于
Add support for T104x board in board file t104x_qds.c, It is common for both T1040 and T1042 as they share same QDS board. T1040QDS board Overview ----------------------- - SERDES Connections, 8 lanes supporting: — PCI Express: supporting Gen 1 and Gen 2; — SGMII — QSGMII — SATA 2.0 — Aurora debug with dedicated connectors (T1040 only) - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM/RDIMMs, of single-, dual- or quad-rank types. -IFC/Local Bus - NAND flash: 8-bit, async, up to 2GB. - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB - GASIC: Simple (minimal) target within Qixis FPGA - PromJET rapid memory download support - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep (T1040 only) - QIXIS System Logic FPGA - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - Video - DIU supports video at up to 1280x1024x32bpp - USB - Supports two USB 2.0 ports with integrated PHYs — Two type A ports with 5V@1.5A per port. — Second port can be converted to OTG mini-AB - SDHC - SDHC port connects directly to an adapter card slot, featuring: - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC — Supporting eMMC memory devices - SPI - On-board support of 3 different devices and sizes - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Add T104xQDS support in Kconfig and Makefile. Also create device tree. Following features are currently not implmented. - SerDes: Aurora - IFC: GASIC, Promjet - QIXIS - Ethernet - DIU - power supplies management - ProfiBus Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Prabhakar Kushwaha 提交于
The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA processor cores with high-performance data path acceleration architecture and network peripheral interfaces required for networking & telecommunications. T1042 personality is a reduced personality of T1040 without Integrated 8-port Gigabit Ethernet switch. The T1040/T1042 SoC includes the following function and features: - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration (SEC 5.0) - RegEx Pattern Matching Acceleration (PME 2.2) - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch (T1040 only) - Four 1 Gbps Ethernet controllers - Two RGMII interfaces or one RGMII and one MII interfaces - High speed peripheral interfaces - Four PCI Express 2.0 controllers running at up to 5 GHz - Two SATA controllers supporting 1.5 and 3.0 Gb/s operation - Upto two QSGMII interface - Upto six SGMII interface supporting 1000 Mbps - One SGMII interface supporting upto 2500 Mbps - Additional peripheral interfaces - Two USB 2.0 controllers with integrated PHY - SD/eSDHC/eMMC - eSPI controller - Four I2C controllers - Four UARTs - Four GPIO controllers - Integrated flash controller (IFC) - Change this to LCD/ HDMI interface (DIU) with 12 bit dual data rate - TDM interface - Multicore programmable interrupt controller (PIC) - Two 8-channel DMA engines - Single source clocking implementation - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: NVarun Sethi <Varun.Sethi@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Diana Craciun 提交于
Updated the device trees according to the corenet-cf binding definition. Signed-off-by: NDiana Craciun <Diana.Craciun@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Diana Craciun 提交于
Updated the device trees according to the corenet-cf binding definition. Signed-off-by: NDiana Craciun <Diana.Craciun@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Martijn de Gouw 提交于
OCA4080 overview: - 1.466 GHz Freescale QorIQ P4080E Processor - 4Gbyte DDR3 on board - 8Mbyte Nor flash - Serial RapidIO 1.2 - 1 x 10/100/1000 BASE-T front ethernet - 1 x 1000 BASE-BX ethernet on AMC connector Signed-off-by: NMartijn de Gouw <martijn.de.gouw@prodrive.nl> [scottwood@freescale.com: minor conflict-related changes] Signed-off-by: NScott Wood <scottwood@freescale.com>
-
由 Valentin Longchamp 提交于
This patch introduces the support for Keymile's kmcoge4 board which is the internal reference design for boards based on Freescale's P2040/P2041 SoCs. This internal reference design is named kmp204x. The peripherals used on this board are: - SPI NOR Flash as bootloader medium - NAND Flash with a ubi partition - 2 PCIe busses (hosts 1 and 3) - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5) - 4 Local Bus windows, with one dedicated to the QRIO reset/power mgmt CPLD - 2 I2C busses - last but not least, the mandatory serial port The patch also adds a defconfig file for this reference design that is necessary because of the lowmem option that must be set higher due to the number of PCIe devices with big ioremapped mem ranges on the boad. Signed-off-by: NValentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: NScott Wood <scottwood@freescale.com>
-