- 15 4月, 2013 1 次提交
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由 Thomas Petazzoni 提交于
This commit migrates the mach-orion5x platforms to use the mvebu-mbus driver and therefore removes the Orion5x-specific addr-map code. The dove_init_early() function now initializes the mvebu-mbus driver by calling mvebu_mbus_init(). We also convert a number of orion5x_setup_xyz_win() calls to the appropriate mvebu_mbus_add_window() calls, as each board was doing its own setup for the NOR window or other devices. Ultimately, those devices will be probed from the DT. The common address decoding windows are now registered in the orion5x_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Dove has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 25 12月, 2012 1 次提交
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由 Stephen Warren 提交于
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 22 11月, 2012 2 次提交
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由 Thomas Petazzoni 提交于
This commit converts the 'LaCie Ethernet Disk mini v2' board to the Device Tree. All devices that have existing Device Tree bindings are converted over to the Device Tree, the other devices remain instantiated in the old way, until the respective drivers get the needed Device Tree bindings. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested by: Maxime Hadjinlian <mhadjinlian@lacie.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
This commit adds basic DT support for the Orion5x SoC family. It adds an orion5x.dtsi description of the Orion5x SoC as well as the needed DT_MACHINE structure to support boards converted to DT in the future. So far, the Device Tree contains the interrupt controller, the GPIO bank, the UART controllers, the SPI controller, the watchdog, the SATA controller, the I2C controller and the cryptographic engine. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested by: Maxime Hadjinlian <mhadjinlian@lacie.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 15 5月, 2012 1 次提交
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由 Andrew Lunn 提交于
Orion5x board files which don't have PCI give warnings: arch/arm/mach-orion5x/common.h:54:38: warning: 'struct pci_dev' declared inside parameter list. Add a forward declaration in the header file, which is the pattern used for other PCI structures. Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
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- 07 3月, 2012 1 次提交
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由 Rob Herring 提交于
Move orion5x specific mach/io.h parts into common.h. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: NNicolas Pitre <nico@linaro.org>
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- 05 1月, 2012 1 次提交
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由 Russell King 提交于
Hook these platforms restart code into the new restart hook rather than using arch_reset(). In addition, convert calls to arm_machine_restart() to orion5x_restart() to ensure that they continue to work as intended. Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 12月, 2011 2 次提交
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由 Andrew Lunn 提交于
Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NMichael Walle <michael@walle.cc> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Compile tested on Dove, orion5x, mv78xx0. Boot tested on Kirkwood. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NMichael Walle <michael@walle.cc> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 17 10月, 2011 1 次提交
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由 Russell King 提交于
Get rid of the mdesc pointer in the fixup function call. No one uses the mdesc pointer, it shouldn't be modified anyway, and we can't wrap it, so let's remove it. Platform files found by: $ regexp=$(git grep -h '\.fixup.*=' arch/arm | sed 's!.*= *\([^,]*\),* *!\1!' | sort -u | tr '\n' '|' | sed 's,|$,,;s,|,\\|,g') $ git grep $regexp arch/arm Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 7月, 2011 1 次提交
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由 Ralf Baechle 提交于
Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> To: Anton Vorontsov <avorontsov@mvista.com> To: Chris Metcalf <cmetcalf@tilera.com> To: Colin Cross <ccross@android.com> Acked-by: N"David S. Miller" <davem@davemloft.net> To: Eric Miao <eric.y.miao@gmail.com> To: Erik Gilling <konkers@android.com> Acked-by: NGuan Xuetao <gxt@mprc.pku.edu.cn> To: "H. Peter Anvin" <hpa@zytor.com> To: Imre Kaloz <kaloz@openwrt.org> To: Ingo Molnar <mingo@redhat.com> To: Ivan Kokshaysky <ink@jurassic.park.msu.ru> To: Jesse Barnes <jbarnes@virtuousgeek.org> To: Krzysztof Halasa <khc@pm.waw.pl> To: Lennert Buytenhek <kernel@wantstofly.org> To: Matt Turner <mattst88@gmail.com> To: Nicolas Pitre <nico@fluxnic.net> To: Olof Johansson <olof@lixom.net> Acked-by: NPaul Mundt <lethal@linux-sh.org> To: Richard Henderson <rth@twiddle.net> To: Russell King <linux@arm.linux.org.uk> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 04 3月, 2011 1 次提交
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由 Lennert Buytenhek 提交于
This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 15 6月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Not all Orion variants do implement the crypto unit. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 09 6月, 2009 1 次提交
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The security accelerator which can act as a puppet player for the crypto engine requires its commands in the sram. This patch adds support for the phys mapping and creates a platform device for the actual driver. [ nico: renamed device name from "mv,orion5x-crypto" to "mv_crypto" so to match the module name and be more generic for Kirkwood use ] Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 21 12月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Split off Orion GPIO handling code into plat-orion/, and add support for multiple sets of (32) GPIO pins. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 20 10月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
This adds DSA switch instantiation hooks to the orion5x and the kirkwood ARM SoC platform code, and instantiates the DSA switch driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE RD, the Linksys WRT350n v2, and the 88F6281 RD boards. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NNicolas Pitre <nico@marvell.com> Tested-by: NPeter van Valderen <linux@ddcrew.com> Tested-by: NDirk Teurlings <dirk@upexia.nl> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 26 9月, 2008 2 次提交
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由 Lennert Buytenhek 提交于
The Orion-1-90 (88F6183) is another member of the Orion SoC family, which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as Root Complex or Endpoint), one 10/100/1000 ethernet interface, one USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface, one TWSI interface, two UARTs, one SPI interface, a NAND controller, a crypto engine, and a 4-channel DMA engine. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
Currently, orion5x uses a hardcoded timer tick rate of 166 MHz, but the actual timer tick rate varies between different members of the SoC family (and can vary based on strap pin settings). This patch prepares for runtime determination of the timer tick rate. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 22 8月, 2008 1 次提交
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由 Per Andersson 提交于
The Kurobox Pro crashes when any of the PCI controller registers are accessed. This patch adds a function to the Orion PCI handling code that board support code can call to disable enumerating the PCI bus entirely, and makes the Kurobox Pro PCI-related init code call this function. Signed-off-by: NPer Andersson <avtobiff@gmail.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 09 8月, 2008 1 次提交
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由 Saeed Bishara 提交于
Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 01 7月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
The Cardbus connector does not have an IDSEL signal, and Cardbus cards are always the intended target of configuration transactions on their local PCI bus. This means that if the Orion's PCI bus signals are hooked up to a Cardbus slot, the same set of PCI functions will will appear 31 times, for each of the PCI device IDs 1-31 (ID 0 is the host bridge). This patch adds a function to the Orion PCI handling code that board support code can call to enable Cardbus mode. When Cardbus mode is enabled, configuration transactions on the PCI local bus are only allowed to PCI IDs 0 (host bridge) and 1 (cardbus device). Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 23 6月, 2008 2 次提交
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由 Lennert Buytenhek 提交于
Instead of having board code poke directly into the MPP configuration registers, and separately calling orion5x_gpio_set_valid_pins() to indicate which MPP pins can be used as GPIO pins, introduce a helper function for configuring the roles of each of the MPP pins, and have that helper function handle gpio validity internally. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NSylver Bruneau <sylver.bruneau@googlemail.com> Acked-by: NRussell King <linux@arm.linux.org.uk>
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由 Lennert Buytenhek 提交于
This patch moves initialisation of EHCI/I2C/UART platform devices from the common orion5x_init() into the board support code. The rationale behind this is that only the board support code knows whether certain peripherals have been brought out on the board, and not initialising peripherals that haven't been brought out is desirable for example: - to reduce user confusion (e.g. seeing both 'eth0' and 'eth1' appear while there is only one ethernet port on the board); and - to allow for future power savings (peripherals that have not been brought out can be clock gated off entirely). Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NRussell King <linux@arm.linux.org.uk>
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- 09 5月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Make the Orion 5x platform code use the mbus window handling code that's in the mv643xx_eth driver, instead of programming the GigE block's mbus window registers by hand. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 29 4月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
The current orion5x board ->map_irq() routines check whether a given bus number lives on the PCIe controller by comparing it with the PCIe controller's primary bus number. This doesn't work in case there are multiple buses in the PCIe domain, i.e. if there exists a PCIe bridge on the primary PCIe bus. This patch adds a helper function (orion5x_pci_map_irq()) that returns the IRQ number for the given PCI device if that device has a hard-wired IRQ, or -1 otherwise, and makes each board's ->map_irq() function use this helper function. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 28 3月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e. not the plat-orion bits.) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NSaeed Bishara <saeed@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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