- 14 1月, 2011 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Acked-by: NNicolas Pitre <nico@fluxnic.net>
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- 09 6月, 2009 1 次提交
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由 Erik Benada 提交于
Signed-off-by: NErik Benada <erikbenada@yahoo.ca> [ nico: fix locking, additional cleanups ] Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 20 2月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Especially on Kirkwood, a couple GPIOs are actually only output capable. Let's separate the ability to configure a GPIO as input or output to accommodate this restriction. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 18 2月, 2009 1 次提交
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由 Nicolas Pitre 提交于
The GPIO interrupts can be configured as either level triggered or edge triggered, with a default of level triggered. When an edge triggered interrupt is requested, the gpio_irq_set_type method is called which currently switches the given IRQ descriptor between two struct irq_chip instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This happens via __setup_irq() which also calls irq_chip_set_defaults() to assign default methods to uninitialized ones. The problem is that irq_chip_set_defaults() is called before the irq_chip reference is switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this case) with uninitialized methods such as chip->startup() causing a kernel oops. Many solutions are possible, such as making irq_chip_set_defaults() global and calling it from gpio_irq_set_type(), or calling __irq_set_trigger() before irq_chip_set_defaults() in __setup_irq(). But those require modifications to the generic IRQ code which might have adverse effect on other architectures, and that would still be a fragile arrangement. Manually copying the missing methods from within gpio_irq_set_type() would be really ugly and it would break again the day new methods with automatic defaults are added. A better solution is to have a single irq_chip instance which can deal with both edge and level triggered interrupts. It is also a good idea to switch the IRQ handler instead, as the edge IRQ handler allows for one edge IRQ event to be queued as the IRQ is actually masked only when that second IRQ is received, at which point the hardware can queue an additional IRQ event, making edge triggered interrupts a bit more reliable. Tested-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 12月, 2008 2 次提交
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由 Lennert Buytenhek 提交于
Split off Orion GPIO IRQ handling code into plat-orion/. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Split off Orion GPIO handling code into plat-orion/, and add support for multiple sets of (32) GPIO pins. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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