- 09 4月, 2015 1 次提交
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由 Ezequiel Garcia 提交于
When the CONTINUE bit is set, the interrupt status we are polling to identify if a transaction has finished can be sporadic. Even though the transfer has finished, the interrupt status may erroneously indicate that there is still data in the FIFO. This behaviour causes random timeouts in large PIO transfers. Instead of using the CONTINUE bit to control the CS lines, use the SPI core's CS GPIO handling. Also, now that the CONTINUE bit is not being used, we can poll for the ALLDONE interrupt to indicate transfer completion. Signed-off-by: NSifan Naeem <sifan.naeem@imgtec.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 07 4月, 2015 2 次提交
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由 Pavel Nakonechny 提交于
According to description in 'include/net/dsa.h', in cascade switches configurations where there are more than one interconnected devices, 'rtable' array in 'dsa_chip_data' structure is used to indicate which port on this switch should be used to send packets to that are destined for corresponding switch. However, dsa_of_setup_routing_table() fills 'rtable' with port numbers of the _target_ switch, but not current one. This commit removes redundant devicetree parsing and adds needed port number as a function argument. So dsa_of_setup_routing_table() now just looks for target switch number by parsing parent of 'link' device node. To remove possible misunderstandings with the way of determining target switch number, a corresponding comment was added to the source code and to the DSA device tree bindings documentation file. This was tested on a custom board with two Marvell 88E6095 switches with following corresponding routing tables: { -1, 10 } and { 8, -1 }. Signed-off-by: NPavel Nakonechny <pavel.nakonechny@skitlab.ru> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Aaron Brice 提交于
Adding fsl,spi-cs-sck-delay and fsl,spi-sck-cs-delay properties to support delays before and after starting the clock in a transfer. Signed-off-by: NAaron Brice <aaron.brice@datasoft.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 27 3月, 2015 1 次提交
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由 Julius Werner 提交于
We have found that we can sometimes see read failures on boards with high-capacitance SPI lines. It seems that the controller samples the Rx data line too early, and its register interface has an "Rx Sample Delay" setting to fine-tune against this issue. This patch adds a new optional device tree entry that can configure this delay in terms of nanoseconds. The kernel will calculate the best-fitting amount of parent clock ticks to program the controller with based on that. Signed-off-by: NJulius Werner <jwerner@chromium.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 11 3月, 2015 1 次提交
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由 Fabrice GASNIER 提交于
This patch adds support to STiH410 SoC. Please note "st,stih410" is already present in device tree. The problem is that it is missing the entry in the match table, and so the L2 cache and other cpus than 0 don't get initialized. Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com> Tested-by: NMaxime Coquelin <maxime.coquelin@st.com> Acked-by: NPeter Griffin <peter.griffin@linaro.org> Acked-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 10 3月, 2015 2 次提交
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由 Matt Porter 提交于
The exact steps provided for submitting binding patches can be read as requiring the bindings to be sent only to the devicetree@vger.kernel.org list. Since the DT maintainers would like to be Cced on any binding submissions, make this requirement explicit in step 2. Signed-off-by: NMatt Porter <mporter@konsulko.com> Signed-off-by: NRob Herring <robh@kernel.org>
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由 Chunyan Zhang 提交于
The file of-serial.txt was only for 8250 compatible UART implementations, so renamed it to 8250.txt to avoid confusing other persons. This is suggested by Arnd, see: http://lists.infradead.org/pipermail/linux-arm-kernel/2014-September/291455.htmlSigned-off-by: NChunyan Zhang <chunyan.zhang@spreadtrum.com> Acked-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NRob Herring <robh@kernel.org>
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- 07 3月, 2015 3 次提交
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由 Andy Gross 提交于
This patch adds DMA capabilities to the spi-qup driver. If DMA channels are present, the QUP will use DMA instead of block mode for transfers to/from SPI peripherals for transactions larger than the length of a block. Signed-off-by: NAndy Gross <agross@codeaurora.org> Signed-off-by: NStanimir Varbanov <stanimir.varbanov@linaro.org> Reviewed-by: Ivan T. Ivanov <iivanov@mm-sol.com Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Desmond Liu 提交于
Fixed behaviour of get_mctrl() serial driver function as documented in: https://www.kernel.org/doc/Documentation/serial/driver Added device-tree properties 'dcd-override', 'dsr-override', 'cts-override', and 'ri-override' specific to the Synopsis 8250 DesignWare UART driver. Allows one to force Data Carrier Detect, Clear To Send, and Data Set Ready signals to permanently be reported as active. The Ring indicator can be forced to be reported as inactive. It is possible that if modem control signalling is enabled on a port that doesn't have these pins (e.g. - a simple two wire Tx/Rx port), the driver can hang indefinitely waiting for the state to change. The new DT properties allow the driver to ignore the state of these pins on serial ports that don't support them, as recommended in the kernel documentation. Reviewed-by: NJD (Jiandong) Zheng <jdzheng@broadcom.com> Signed-off-by: NJonathan Richardson <jonathar@broadcom.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Matt Porter 提交于
A clock specifier is required for i.MX I2C and is provided in all DTS implementations. Add this to the list of required properties in the binding. Signed-off-by: NMatt Porter <mporter@konsulko.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 06 3月, 2015 1 次提交
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由 Matt Porter 提交于
The fsl-imx-cspi binding contains language indicating compatible strings to be used that is not valid for all supported parts e.g. Should be "fsl,<soc>-cspi" or "fsl,<soc>-ecspi". Fix this by enumerating the set of valid compatible strings. The binding is also missing the clocks/clock-names properties so document these and the two required ipg and per clocks. Signed-off-by: NMatt Porter <mporter@konsulko.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 05 3月, 2015 1 次提交
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由 Iyappan Subramanian 提交于
Signed-off-by: NIyappan Subramanian <isubramanian@apm.com> Signed-off-by: NKeyur Chudgar <kchudgar@apm.com> Tested-by: NMark Langsdorf <mlangsdo@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 3月, 2015 1 次提交
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由 Sylvain Rochet 提交于
atmel,idle-halt property should be used with care, it actually makes the watchdog not counting when the CPU is in idle state, therefore the watchdog reset time depends on mean CPU usage and will not reset at all of the CPU stop working while it is in idle state, which is probably not what you want. Signed-off-by: NSylvain Rochet <sylvain.rochet@finsecur.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 02 3月, 2015 2 次提交
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由 Niklas Cassel 提交于
Signed-off-by: NNiklas Cassel <nks@flawful.org> Signed-off-by: NRob Herring <robh@kernel.org>
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由 Michal Simek 提交于
PATA(pata_arasan_cf.c) and SDHCI(sdhci-of-arasan.c) drivers are already using this prefix. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NRob Herring <robh@kernel.org>
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- 27 2月, 2015 2 次提交
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由 Marek Szyprowski 提交于
This patch adds support for making one power domain a sub-domain of other domain. This is useful for modeling power dependences for devices like TV Mixer or Camera ISP, which needs to have more than one power domain enabled to be operational. Based on previous work by Amit Daniel Kachhap <amit.daniel@samsung.com>. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Marek Szyprowski 提交于
This patch adds a note on defining subdomains to generic PM domain binding documentation to let power domain providers use common approach for defining power domain hierarchy. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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- 26 2月, 2015 1 次提交
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由 Tom Lendacky 提交于
The PHY requires different settings for the Decision Feedback Analyzer (DFE) when running in KX mode vs. KR mode. Update the code to change these settings when changing modes in order to provide a more stable link. Additionally, adjust the 10GbE PQ skew default setting to a more sane value. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 2月, 2015 1 次提交
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由 David Daney 提交于
- Use of_irq_init() to initialize interrupt controllers - Get rid of some unlikely() - Add CIB to support SATA and other interrupts - Add support for CIU SUM2 interrupt sources Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLeonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: NPeter Swain <peter.swain@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8947/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 18 2月, 2015 4 次提交
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Add binding for jz4740 watchdog timer. It is a simple watchdog timer. Signed-off-by: NZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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由 Mike Looijmans 提交于
On some chips, like the TPS386000, the trigger cannot be disabled and the CPU must keep toggling the line at all times. Add a switch "always_running" to keep toggling the GPIO line regardless of the state of the soft part of the watchdog. The "armed" member keeps track of whether a timeout must also cause a reset. Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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由 Matthias Brugger 提交于
Signed-off-by: NMatthias Brugger <matthias.bgg@gmail.com> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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由 Naidu Tellapati 提交于
Add the devicetree binding document for ImgTec PDC Watchdog Timer. Reviewed-by: NAndrew Bresticker <abrestic@chromium.org> Signed-off-by: NNaidu Tellapati <Naidu.Tellapati@imgtec.com> Signed-off-by: NJude Abraham <Jude.Abraham@gmail.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@imgtec.com> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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- 17 2月, 2015 1 次提交
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由 Ray Jui 提交于
Add initial support to the Broadcom iProc I2C controller found in the iProc family of SoCs. The iProc I2C controller has separate internal TX and RX FIFOs, each has a size of 64 bytes. The iProc I2C controller supports two bus speeds including standard mode (100kHz) and fast mode (400kHz) Signed-off-by: NRay Jui <rjui@broadcom.com> Reviewed-by: NScott Branden <sbranden@broadcom.com> Reviewed-by: NKevin Cernekee <cernekee@chromium.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 14 2月, 2015 5 次提交
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由 Gregory CLEMENT 提交于
The Marvell Armada 38x SoCs contains an RTC which differs from the RTC used in the other mvebu SoCs until now. This forth version of the patch set adds support for this new IP and enable it in the Device Tree of the Armada 38x SoC. This patch (of 5): The Armada 38x SoCs come with a new RTC which differs from the one used in the other mvebu SoCs until now. This patch describes the binding of this RTC. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Arnaud Ebalard <arno@natisbad.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Boris BREZILLON <boris.brezillon@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Cc: Tawfik Bayouk <tawfik@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Arnaud Ebalard 提交于
This patch adds support for Abracon AB-RTCMC-32.768kHz-B5ZE-S3 RTC/Calendar module w/ I2C interface. This support includes RTC time reading and setting, Alarm (1 minute accuracy) reading and setting, and battery low detection. The device also supports frequency adjustment and two timers but those features are currently not implemented in this driver. Due to alarm accuracy limitation (and current lack of timer support in the driver), UIE mode is not supported. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Peter Huewe <peter.huewe@infineon.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robherring2@gmail.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Landley <rob@landley.net> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Arnaud Ebalard 提交于
This series adds support for Abracon AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip. Unlike many RTC chips, it includes an internal oscillator which spares room on the PCB. It also has some interesting features, like battery low detection (which the driver in this series supports). The only small "limitation" (mainly due to what RTC subsystem expects from RTC chips) is the fact that its alarm is accurate to the second. This series provides a solution (described below) for that limitation using another mechanism of the chip. I decided to split support between three different patches for this v0: - Patch 1/3: it simply references Abracon Corporation in vendor-prefixes documentation file. As Abracon has no NASDAQ ticker symbol; I have decided to use "abcn" (I initially started my work w/ "ab" but later changed for "abcn" which looked more meaningful) - Patch 2/3: it adds initial support for the chip and provides the ability to read/write time and also read/write alarm. As the alarm the chip provides is accurate to the minute, the support provided by this patch also has this limitation (e.g. UIE mode is not supported). - Patch 3/3: the chip supports a watchdog timer which can be used to extend the alarm mechanism in patch 2/3 in order to provide support for alarms under one minute (e.g. support UIE mode). In practice, the logic I implemented is to use the watchdog timer for alarms which are at most 4 minutes in the future and use the common alarm mechanism for alarms which are set to larger values. With that additional patch the device fully passes the rtctest.c program. I decided to split the driver between two patches (2 and 3 of 3) in order to ease review: patch 2 should be pretty straightforward to read for someone familiar w/ RTC subsystem. Patch 3 only extends what is in patch 2 regarding alarms. This patch (of 3): Documentation/devicetree/bindings/vendor-prefixes.txt: add vendor prefix for Abracon Corporation Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Peter Huewe <peter.huewe@infineon.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robherring2@gmail.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Landley <rob@landley.net> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Arnaud Ebalard 提交于
Current in-tree users of ISL12057 RTC chip (NETGEAR ReadyNAS 102, 104 and 2120) do not have the IRQ#2 pin of the chip (associated w/ the Alarm1 mechanism) connected to their SoC, but to a PMIC (TPS65251 FWIW). This specific hardware configuration allows the NAS to wake up when the alarms rings. Recently introduced alarm support for ISL12057 relies on the provision of an "interrupts" property in system .dts file, which previous three users will never get. For that reason, alarm support on those devices is not function. To support this use case, this patch adds a new DT property for ISL12057 (isil,irq2-can-wakeup-machine) to indicate that the chip is capable of waking up the device using its IRQ#2 pin (even though it does not have its IRQ#2 pin connected directly to the SoC). This specific configuration was tested on a ReadyNAS 102 by setting an alarm, powering off the device and see it reboot as expected when the alarm rang w/: # echo `date '+%s' -d '+ 1 minutes'` > /sys/class/rtc/rtc0/wakealarm # shutdown -h now As a side note, the ISL12057 remains in the list of trivial devices, because the property is not per se required by the device to work but can help handle system w/ specific requirements. In exchange, the new feature is described in details in a specific documentation file. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Peter Huewe <peter.huewe@infineon.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Darshana Padmadas <darshanapadmadas@gmail.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Landley <rob@landley.net> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Kumar Gala <galak@codeaurora.org> Cc: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joshua Clayton 提交于
Add compatible string "nxp,rtc-pcf2123" Document the binding Signed-off-by: NJoshua Clayton <stillcompiling@gmail.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Grant Likely <grant.likely@linaro.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 11 2月, 2015 1 次提交
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由 Ajay Kumar 提交于
This patch is based on exynos-drm-next branch of Inki Dae's tree at: git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git DECON(Display and Enhancement Controller) is the new IP in exynos7 SOC for generating video signals using pixel data. DECON driver can be used to drive 2 different interfaces on Exynos7: DECON-INT(video controller) and DECON-EXT(Mixer for HDMI) The existing FIMD driver code was used as a template to create DECON driver. Only DECON-INT is supported as of now, and DECON-EXT support will be added later. The current version of the driver supports video mode displays. Changelog v2: - Change config name, DRM_EXYNOS_DECON to DRM_EXYNOS7_DECON. Signed-off-by: NAkshu Agrawal <akshua@gmail.com> Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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- 08 2月, 2015 1 次提交
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由 Zhou Wang 提交于
This patch adds the related dts binding document for Hisilicon 504 NAND controller. Signed-off-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 07 2月, 2015 2 次提交
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由 Marek Szyprowski 提交于
Mixed need to have hdmi clock enabled to properly perform power on/off sequences, so add handling of this clock directly to the mixer driver. Dependency between hdmi clock and mixer module has been observed on Exynos4 based boards. Suggested-by: NAndrzej Hajda <a.hajda@samsung.com> Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Kenneth Westfield 提交于
Add documentation to the sound directory of the device-tree bindings for the Maxim MAX98357A audio DAC. Signed-off-by: NKenneth Westfield <kwestfie@codeaurora.org> Acked-by: NBanajit Goswami <bgoswami@codeaurora.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 06 2月, 2015 3 次提交
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由 Ley Foon Tan 提交于
The Altera mailbox allows for interprocessor communication. It supports only one channel and work as either sender or receiver. Signed-off-by: NLey Foon Tan <lftan@altera.com>
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由 Max Filippov 提交于
Allow bus clock specification as a common clock handle. This makes this controller easier to use in a setup based on common clock framework. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Max Filippov 提交于
clock-frequency property is meant to control the bus frequency for i2c bus drivers, but it was incorrectly used to specify i2c controller input clock frequency. Introduce new attribute, opencores,ip-clock-frequency, that specifies i2c controller clock frequency and make clock-frequency attribute compatible with other i2c drivers. Maintain backwards compatibility in case opencores,ip-clock-frequency attribute is missing. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 05 2月, 2015 4 次提交
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由 Andy Shevchenko 提交于
Instead of using magic number in the code the patch provides DW_DMA_MAX_NR_MASTERS constant. While here, restrict the reading of data width array by amount of the actual number of AHB masters. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andrew Bresticker 提交于
Add a binding document for the IMG Multi-threaded DMA Controller (MDC) present on the MIPS-based Pistachio and other IMG SoCs. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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This patch adds binding for the jz4740-i2s driver. Signed-off-by: NZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Acked-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Kaixu Xia 提交于
Now we use the device name to identify replicator instead of a unique number, so just remove it. Signed-off-by: NKaixu Xia <xiakaixu@huawei.com> Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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