As per advice from Jean Delvare.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Acked-by: NJean Delvare <khali@linux-fr.org>
Signed-off-by: NDave Airlie <airlied@redhat.com>

These got lost in the last i2c cleanup.  Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=23222Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>

A process suspended waiting for a higher sequence or no sequence to unreserve,
a bo may be beaten to the reservation by a process with a lower sequence.
In that case the first process should give up trying to reserve and
return -EAGAIN. In order for that to happen, we must wake waiting processes
when we change sequence, so that they have a chance to detect the new
sequence.
Signed-off-by: NThomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

* 'nouveau/for-airlied' of /ssd/git/drm-nouveau-next: (25 commits)
  nouveau: Acknowledge HPD irq in handler, not bottom half
  drm/nouveau: Fix a few confusions between "chipset" and "card_type".
  drm/nouveau: don't expose backlight control when available through ACPI
  drm/nouveau/pm: improve memtiming mappings
  drm/nouveau: Make PCIE GART size depend on the available RAMIN space.
  drm/nouveau: Return error from nouveau_gpuobj_new if we're out of RAMIN.
  drm/nouveau: Fix compilation issues in nouveau_pm when CONFIG_HWMON is not set
  drm/nouveau: Don't use load detection for connector polling.
  drm/nv10-nv20: Fix instability after MPLL changes.
  drm/nv50: implement possible workaround for NV86 PGRAPH TLB flush hang
  drm/nouveau: Don't poll LVDS outputs.
  drm/nouveau: Use "force" to decide if analog load detection is ok or not.
  drm/nv04: Fix scanout over the 16MB mark.
  drm/nouveau: fix nv40 pcie gart size
  drm/nva3: fix overflow in fixed point math used for pll calculation
  drm/nv10: Balance RTs expected to be accessed simultaneously by the 3d engine.
  drm/nouveau: Expose some BO usage flags to userspace.
  drm/nouveau: Reduce severity of the unknown getparam error.
  drm/nouveau: Avoid lock dependency between ramht and ramin spinlocks.
  drm/nouveau: Some random cleanups.
  ...

We aren't currently using tiling in userspace on evergreen,
but the info we currently return for the tiling info query
(gb_addr_config) is no adequate for userspace tiling alignment
calculations.  It does not contain the bank info.  Create a custom
tiling info dword with all the necessary info (num channels,
num banks, group size, row size).
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

We were previously dropping alignment requests on the floor
when allocating buffers so we always ended up page aligned.
Certain tiling modes on 6xx+ require larger alignment which
wasn't happening before.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Cc: Jerome Glisse <j.glisse@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NThomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This causes the connector to not be added since i2c init fails
for the adapter.  Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=31688

Noticed by Ari Savolainen.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Cc: Ari Savolainen <ari.m.savolainen@gmail.com>
Cc: Jean Delvare <khali@linux-fr.org>
Cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>

These are external encoder chips connected via DVO or DP.
The actual external encoder programming is handled by the
kms encoder functions for primary encoder.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Handle all the various asic family specific things for DVO.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The eDP panel must be powered up for aux transactions, so power it
up for detect and mode probe functions, otherwise power it up or
down based on dpms.

v2:
- only mess with eDP panel on DCE4+
- only mess with eDP panel on eDP connectors, not all DP connectors
v3:
- be extra careful to only mess with eDP panels on eDP connectors
v4:
- avoid possible null derefernce if a connector has not been
assigned to the encoder
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

If there was no connector mapped to the encoder, atombios_get_encoder_mode()
returned 0 which is the id for DP.  Return something sane instead based on
the encoder id.  This avoids hitting the DP paths on non-DP encoders.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>

Seems some newer systems require this explicitly.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Looks like a typo in:
drm/radeon/r600: fix tiling issues in CS checker.
(f30df2fa)
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

enable_vblank implementations should use negative result to indicate error.
radeon_enable_vblank() returns EINVAL in this case.  Change this to -EINVAL.
Signed-off-by: NVasiliy Kulikov <segoon@openwall.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Tiled buffers have the same alignment requirements regardless of
whether the surface is for db, cb, or textures.  Previously, the
calculations where inconsistent for each buffer type.

- Unify the alignment calculations in a common function
- Standardize the alignment units (pixels for pitch/height/depth,
bytes for base)
- properly check the buffer base alignments
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The old code generated an interrupt storm bad enough to completely
take down my system.
Signed-off-by: NAndy Lutomirski <luto@mit.edu>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Avoid confusing userspace by not publishing backlight controls if ACPI
equivalents are available.
Reported-by: NAaron Sowry <aaron@aeneby.se>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Improvements:
 - Fix bug in switch statement
 - Add parts of 0x10022c, 0x10023c
 - Clean up 0x100234
 - Comment out assumption in 0x100228 until verified
Signed-off-by: NRoy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Reported-by: NTomas Miljenovic <tomasmiljenovic@gmail.com>
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Reported-by: NTomas Miljenovic <tomasmiljenovic@gmail.com>
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NMartin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Analog output polling makes GL programs jerky when pageflip is being
used because it's carried out with the mode_config mutex held.
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Reported-by: NXavier Chantry <chantry.xavier@gmail.com>
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Nouveau sets the PCIE GART size to 64MiB for all cards before nv50,
but nv40 has enough RAMIN space to support 512MiB GART size. This
patch fixes this value to make use of this hardware capability.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

And a slight tweak which gets us closer to VBIOS-calculated numbers.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

This will be needed for Z compression and to take smarter placement
decisions.
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Acked-by: NBen Skeggs <bskeggs@redhat.com>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Acked-by: NBen Skeggs <bskeggs@redhat.com>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

The ramht code called some gpuobj functions with the HARDIRQ-safe
RAMHT spinlock held, this could potentially lead to a dead lock
because ramin_lock is HARDIRQ-unsafe.
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Remove some unused/duplicated definitions and make sparse happy again.
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

This allows the user to set a mode larger than the native one, useful
if we had trouble finding the actual native mode (e.g. because it goes
above the hardware bandwidth limits).
Reported-by: NGrzesiek Sójka <pld@pfu.pl>
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Reported-by: NGrzesiek Sójka <pld@pfu.pl>
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>