1. 22 10月, 2008 1 次提交
    • B
      [ARM] msm: rename ARCH_MSM7X00A to ARCH_MSM · 1637de0c
      Brian Swetland 提交于
      The MSM architecture covers a wider family of chips than just the MSM7X00A.
      Move to a more generic name, in perparation for supporting the specific
      SoC variants as sub-architectures (ARCH_MSM7X01A, ARCH_MSM722X, etc).  This
      gives us ARCH_MSM for the (many) common peripherals.
      
      This also removes the unused/obsolete config item MSM7X00A_IDLE.
      Signed-off-by: NBrian Swetland <swetland@google.com>
      1637de0c
  2. 20 10月, 2008 1 次提交
    • M
      container freezer: implement freezer cgroup subsystem · dc52ddc0
      Matt Helsley 提交于
      This patch implements a new freezer subsystem in the control groups
      framework.  It provides a way to stop and resume execution of all tasks in
      a cgroup by writing in the cgroup filesystem.
      
      The freezer subsystem in the container filesystem defines a file named
      freezer.state.  Writing "FROZEN" to the state file will freeze all tasks
      in the cgroup.  Subsequently writing "RUNNING" will unfreeze the tasks in
      the cgroup.  Reading will return the current state.
      
      * Examples of usage :
      
         # mkdir /containers/freezer
         # mount -t cgroup -ofreezer freezer  /containers
         # mkdir /containers/0
         # echo $some_pid > /containers/0/tasks
      
      to get status of the freezer subsystem :
      
         # cat /containers/0/freezer.state
         RUNNING
      
      to freeze all tasks in the container :
      
         # echo FROZEN > /containers/0/freezer.state
         # cat /containers/0/freezer.state
         FREEZING
         # cat /containers/0/freezer.state
         FROZEN
      
      to unfreeze all tasks in the container :
      
         # echo RUNNING > /containers/0/freezer.state
         # cat /containers/0/freezer.state
         RUNNING
      
      This is the basic mechanism which should do the right thing for user space
      task in a simple scenario.
      
      It's important to note that freezing can be incomplete.  In that case we
      return EBUSY.  This means that some tasks in the cgroup are busy doing
      something that prevents us from completely freezing the cgroup at this
      time.  After EBUSY, the cgroup will remain partially frozen -- reflected
      by freezer.state reporting "FREEZING" when read.  The state will remain
      "FREEZING" until one of these things happens:
      
      	1) Userspace cancels the freezing operation by writing "RUNNING" to
      		the freezer.state file
      	2) Userspace retries the freezing operation by writing "FROZEN" to
      		the freezer.state file (writing "FREEZING" is not legal
      		and returns EIO)
      	3) The tasks that blocked the cgroup from entering the "FROZEN"
      		state disappear from the cgroup's set of tasks.
      
      [akpm@linux-foundation.org: coding-style fixes]
      [akpm@linux-foundation.org: export thaw_process]
      Signed-off-by: NCedric Le Goater <clg@fr.ibm.com>
      Signed-off-by: NMatt Helsley <matthltc@us.ibm.com>
      Acked-by: NSerge E. Hallyn <serue@us.ibm.com>
      Tested-by: NMatt Helsley <matthltc@us.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      dc52ddc0
  3. 10 10月, 2008 1 次提交
    • N
      [ARM] 5295/1: make ZONE_DMA optional · 3bca103a
      Nicolas Pitre 提交于
      Most ARM machines don't need a special "DMA" memory zone, and
      when configured out, the kernel becomes a bit smaller:
      
      |   text    data     bss     dec     hex filename
      |3826182  102384  111700 4040266  3da64a vmlinux
      |3823593  101616  111700 4036909  3d992d vmlinux.nodmazone
      
      This is because the system now has only one zone total which effect is
      to optimize away many conditionals in page allocation paths.
      
      So let's configure this zone only on machines that need split zones.
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      3bca103a
  4. 02 10月, 2008 5 次提交
  5. 26 9月, 2008 1 次提交
    • L
      [ARM] Orion: add 88F6183 (Orion-1-90) support · d323ade1
      Lennert Buytenhek 提交于
      The Orion-1-90 (88F6183) is another member of the Orion SoC family,
      which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as
      Root Complex or Endpoint), one 10/100/1000 ethernet interface, one
      USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface,
      one TWSI interface, two UARTs, one SPI interface, a NAND controller,
      a crypto engine, and a 4-channel DMA engine.
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      d323ade1
  6. 17 9月, 2008 1 次提交
  7. 07 9月, 2008 2 次提交
  8. 01 9月, 2008 3 次提交
  9. 28 8月, 2008 1 次提交
    • M
      [ARM] Skip memory holes in FLATMEM when reading /proc/pagetypeinfo · e80d6a24
      Mel Gorman 提交于
      Ordinarily, memory holes in flatmem still have a valid memmap and is safe
      to use. However, an architecture (ARM) frees up the memmap backing memory
      holes on the assumption it is never used. /proc/pagetypeinfo reads the
      whole range of pages in a zone believing that the memmap is valid and that
      pfn_valid will return false if it is not. On ARM, freeing the memmap breaks
      the page->zone linkages even though pfn_valid() returns true and the kernel
      can oops shortly afterwards due to accessing a bogus struct zone *.
      
      This patch lets architectures say when FLATMEM can have holes in the
      memmap. Rather than an expensive check for valid memory, /proc/pagetypeinfo
      will confirm that the page linkages are still valid by checking page->zone
      is still the expected zone. The lookup of page_zone is safe as there is a
      limited range of memory that is accessed when calling page_zone.  Even if
      page_zone happens to return the correct zone, the impact is that the counters
      in /proc/pagetypeinfo are slightly off but fragmentation monitoring is
      unlikely to be relevant on an embedded system.
      Reported-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
      Signed-off-by: NMel Gorman <mel@csn.ul.ie>
      Tested-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e80d6a24
  10. 30 7月, 2008 1 次提交
  11. 29 7月, 2008 1 次提交
  12. 26 7月, 2008 2 次提交
    • R
      [ARM] fix IOP32x, IOP33x, MXC and Samsung builds · bb2b180c
      Russell King 提交于
      7444a72e caused these platforms to lose
      their GPIOLIB configuration.  Convert the missed Kconfig symbols using:
      
        sed -i s/HAVE_GPIO_LIB/ARCH_REQUIRE_GPIOLIB/ arch/arm/Kconfig arch/arm/plat-s3c24xx/Kconfig
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      bb2b180c
    • M
      gpiolib: allow user-selection · 7444a72e
      Michael Buesch 提交于
      This patch adds functionality to the gpio-lib subsystem to make it
      possible to enable the gpio-lib code even if the architecture code didn't
      request to get it built in.
      
      The archtitecture code does still need to implement the gpiolib accessor
      functions in its asm/gpio.h file.  This patch adds the implementations for
      x86 and PPC.
      
      With these changes it is possible to run generic GPIO expansion cards on
      every architecture that implements the trivial wrapper functions.  Support
      for more architectures can easily be added.
      Signed-off-by: NMichael Buesch <mb@bu3sch.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Cc: David Brownell <david-b@pacbell.net>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Jean Delvare <khali@linux-fr.org>
      Cc: Samuel Ortiz <sameo@openedhand.com>
      Cc: Kumar Gala <galak@gate.crashing.org>
      Cc: Sam Ravnborg <sam@ravnborg.org>
      Cc: Adrian Bunk <bunk@stusta.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      7444a72e
  13. 25 7月, 2008 1 次提交
  14. 24 7月, 2008 1 次提交
    • J
      kgdb: support for ARCH=arm · 5cbad0eb
      Jason Wessel 提交于
      This patch adds the ARCH=arm specific a kgdb backend, originally
      written by Deepak Saxena <dsaxena@plexity.net> and George Davis
      <gdavis@mvista.com>.  Geoff Levand <geoffrey.levand@am.sony.com>,
      Nicolas Pitre, Manish Lachwani, and Jason Wessel have contributed
      various fixups here as well.
      
      The KGDB patch makes one change to the core ARM architecture such that
      the traps are initialized early for use with the debugger or other
      subsystems.
      
      [ mingo@elte.hu: small cleanups. ]
      [ ben-linux@fluff.org: fixed early_trap_init ]
      Signed-off-by: NJason Wessel <jason.wessel@windriver.com>
      Acked-by: NDeepak Saxena <dsaxena@plexity.net>
      5cbad0eb
  15. 19 7月, 2008 1 次提交
  16. 10 7月, 2008 1 次提交
  17. 05 7月, 2008 2 次提交
  18. 03 7月, 2008 2 次提交
  19. 26 6月, 2008 1 次提交
  20. 23 6月, 2008 5 次提交
    • S
      [ARM] add Marvell 78xx0 ARM SoC support · 794d15b2
      Stanislav Samsonov 提交于
      The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
      (depending on the model) one or two Feroceon CPU cores with 512K of L2
      cache and VFP coprocessors running at (depending on the model) between
      800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
      interfaces that can each run either in x4 or quad x1 mode, three USB
      2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
      TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
      interface, four UARTs, and depending on the model, two or four gigabit
      ethernet interfaces.
      
      This patch adds basic support for the platform, and allows booting
      on the MV78x00 development board, with functional UARTs, SATA, PCIe,
      GigE and USB ports.
      Signed-off-by: NStanislav Samsonov <samsonov@marvell.com>
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      794d15b2
    • S
      [ARM] add Marvell Kirkwood (88F6000) SoC support · 651c74c7
      Saeed Bishara 提交于
      The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
      Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
      a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
      interface, and IDMA/XOR engines, and depending on the model, also
      features one or two Gigabit Ethernet interfaces, two SATA II
      interfaces, one or two TWSI interfaces, one or two UARTs, a
      TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
      an SDIO interface.
      
      This patch adds supports for the Marvell DB-88F6281-BP Development
      Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
      enabling support for the PCIe interface, the USB interface, the
      ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
      UARTs, and the NAND controller.
      Signed-off-by: NSaeed Bishara <saeed@marvell.com>
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      651c74c7
    • L
      [ARM] add Marvell Loki (88RC8480) SoC support · 777f9beb
      Lennert Buytenhek 提交于
      The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
      core running at between 400 MHz and 1.0 GHz, and features a 64 bit
      DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
      two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
      two TWSI controllers, and IDMA/XOR engines.
      
      This patch adds support for the Marvell LB88RC8480 Development
      Board, enabling the use of the PCIe interfaces, the ethernet
      interfaces, the TWSI interfaces and the UARTs.
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      777f9beb
    • L
    • N
      [ARM] latencytop support · f76e9154
      Nicolas Pitre 提交于
      Available for !SMP only at the moment.
      
      From Russell:
      
      |Basically, if a thread is running on a CPU, thread_saved_fp() is invalid.
      |So, the question is: what guarantees do we have here that 'tsk' is not
      |running on another CPU?
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      Tested-by: NLennert Buytenhek <buytenh@marvell.com>
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      f76e9154
  21. 02 6月, 2008 1 次提交
  22. 19 5月, 2008 1 次提交
  23. 13 5月, 2008 1 次提交
  24. 03 5月, 2008 1 次提交
    • A
      [ARM] 5015/1: arm: remove ARCH_CO285 · e055d5bf
      Adrian Bunk 提交于
      Trying to compile a kerel for ARCH_CO285 fails with the following error:
      
      <--  snip  -->
      
      ...
        CC      arch/arm/mach-footbridge/dc21285.o
      /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:
      In function 'dc21285_base_address':
      /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: 'PCICFG0_BASE' undeclared (first use in this function)
      /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: (Each undeclared identifier is reported only once
      /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: for each function it appears in.)
      /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:57: error: 'PCICFG1_BASE' undeclared (first use in this function)
      /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:
      In function 'dc21285_scan_bus':
      /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:286: error: implicit declaration of function 'pci_scan_bus'
      ...
      make[2]: *** [arch/arm/mach-footbridge/dc21285.o] Error 1
      
      <--  snip  -->
      
      This does not seem to be a recent breakage.
      
      The ARCH_CO285 support is old - kernel 2.2.0 contains first traces of
      it, an it seems to have been pretty complete in later 2.2 kernels.
      
      Since it seems to be completely dead code now this patch therefore
      removes it.
      Signed-off-by: NAdrian Bunk <bunk@kernel.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e055d5bf
  25. 29 4月, 2008 1 次提交
    • A
      ARM: always select HAVE_IDE · 2064c946
      Adrian Bunk 提交于
      It's plain wrong for PCMCIA to select HAVE_IDE that implies e.g. the
      availability of an asm/ide.h
      
      It turns out this was done for ARM, and we can simply always select 
      HAVE_IDE on ARM instead of manually tracking which platforms might 
      possible have an IDE controller directly or indirectly.
      Signed-off-by: NAdrian Bunk <bunk@kernel.org>
      Cc: Russell King <rmk+lkml@arm.linux.org.uk>
      Cc: Sam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      2064c946
  26. 20 4月, 2008 1 次提交