- 10 5月, 2015 4 次提交
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由 Andrew Lunn 提交于
The mv88e6172 is part of the mv88e6352 family of devices. Move support for it out of the mv88e6171 driver into the mv88e6352, which results in some simplifications to the code. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
Use defines for registers, shifts and bits in the remaining register accesses in the individual drivers, in order to aid readability. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
Now that setting up a port is identical for all switches, centralisers the code looping over all the ports to set them up. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
The port setup code in the individual drivers is identical for 6123, 6171, and 6352, and very similar in 6131. Move it all into mv88e6xxx, using the chip families to differentiate on features. Similarly, the global setup is also very similar. Move the majority into mv8e6xxx. The chips themselves fall into families. Add helpers which uses the device IDs to determine if a device is a member of a family or not. Add some additional device IDs to the existing list, to make these helper functions more complete. However these IDs are not yet added to the probe functions. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 4月, 2015 6 次提交
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由 Andrew Lunn 提交于
Rather than refer to registers by number, define mnemonics. Also define mnemonics for the commonly used bits within the registers. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Tested-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
Reading the statistics from the hardware is the same for all chips. What differs is the number of available statistics. Have just one copy of the code in the shared mv88e6xxx. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NGuenter Roeck <linux@roeck-us.net> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
Move the common code for reading and writing phy registers into the shared mv88e6xxx. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Tested-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
Marvell switches are all reset in nearly the same way. The only difference is if the PPU should be enabled or not. Move this code into the shared mv88x6xxx.c. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Tested-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
As a step towards consolidating code, consistently set the number of ports in the private state structure, and make use of it in loops. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NGuenter Roeck <linux@roeck-us.net> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Guenter Roeck 提交于
This will let us use the switch product IDs in the common source code. Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 3月, 2015 5 次提交
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由 Andrew Lunn 提交于
Wire up the common code for setting up hardware bridging and access to the forwarding database. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
The mv88e6172 has support for EEE. Check for the product ID and call the common code if applicable. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
Make the code more readable by using defines for the switch IDs. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Guenter Roeck 提交于
Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Guenter Roeck 提交于
Code used and needed in mv886xxx.c should be initialized there as well, so factor it out from the individual initialization files. Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 2月, 2015 1 次提交
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由 Andrew Lunn 提交于
When the device is configured to use single chip addressing mode, the phy devices of the port are not accessible on the host MDIO bus. Instead the switch internal MDIO bus must be used. For this to work, the phy polling unit must be enabled. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 11月, 2014 2 次提交
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由 Andrew Lunn 提交于
The infrastructure can now report switch registers to ethtool. Add support for it to the mv88e6171 driver. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
This chip also has a temperature sensor which can be read using the common code. In order to use it, add the needed mutex protection for accessing registers via the shared code. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 11月, 2014 1 次提交
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由 Andrew Lunn 提交于
The mv88e6172 is very similar to the mv88e6171. So extend the mv88e6171 driver to support it. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 10月, 2014 1 次提交
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由 Andrew Lunn 提交于
The mv88e6171 can support two different tagging protocols, DSA and EDSA. The switch driver structure only allows one protocol to be enumerated, and DSA was chosen. However the Kconfig entry ensures the EDSA tagging code is built. With a minimal configuration, we then end up with a mismatch. The probe is successful, EDSA tagging is used, but the switch is configured for DSA, resulting in mangled packets. Change the switch driver structure to enumerate EDSA, fixing the mismatch. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Fixes: 42f27253 ("net: DSA: Marvell mv88e6171 switch driver") Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 10月, 2014 1 次提交
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由 Guenter Roeck 提交于
tag_protocol is now an enum, so drivers have to check against it. Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 9月, 2014 1 次提交
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由 Alexander Duyck 提交于
This change makes it so that instead of passing and storing a mii_bus we instead pass and store a host_dev. From there we can test to determine the exact type of device, and can verify it is the correct device for our switch. So for example it would be possible to pass a device pointer from a pci_dev and instead of checking for a PHY ID we could check for a vendor and/or device ID. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 9月, 2014 2 次提交
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由 Andrew Lunn 提交于
This is the Marvell driver with some cleanups by Claudio Leite and myself. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Cc: Claudio Leite <leitec@staticky.com> Signed-off-by: NClaudio Leite <leitec@staticky.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
Now that we introduced an additional multiplexing/demultiplexing layer with commit 3e8a72d1 ("net: dsa: reduce number of protocol hooks") that lives within the DSA code, we no longer need to have a given switch driver tag_protocol be an actual ethertype value, instead, we can replace it with an enum: dsa_tag_protocol. Do this replacement in the drivers, which allows us to get rid of the cpu_to_be16()/htons() dance, and remove ETH_P_BRCMTAG since we do not need it anymore. Suggested-by: NAlexander Duyck <alexander.duyck@gmail.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 5月, 2014 1 次提交
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由 Florian Fainelli 提交于
Use the helper function to retrieve the driver private context instead of using (void *)(ds + 1). Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 1月, 2013 2 次提交
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由 Barry Grussling 提交于
Convert DSA msleep calls to timeout/usleep_range calls as reported by checkpatch.pl. Signed-off-by: NBarry Grussling <barry@grussling.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Barry Grussling 提交于
Convert DSA driver comments to network-style comments as reported by checkpatch.pl. Fix spelling error. Signed-off-by: NBarry Grussling <barry@grussling.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 1月, 2012 1 次提交
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由 Paul Gortmaker 提交于
An implicit instance of module.h leaked back into existence and was masking the fact that these drivers weren't calling out the include for itself. Fix the drivers before we remove the implicit include path via net/netprio_cgroup.h file. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 1月, 2012 1 次提交
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由 Chris Healy 提交于
Add reporting of silicon revision during the probe function for Marvell 88E6123/88E6161/88E6165 switches. Signed-off-by: NChris Healy <cphealy@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 11月, 2011 2 次提交
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由 Ben Hutchings 提交于
Support for specific hardware belongs under drivers/net/ not net/. Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Acked-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ben Hutchings 提交于
Any headers included by drivers should be under include/, and any definitions they use are not really private to the core as the name "dsa_priv.h" suggests. Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Acked-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 11月, 2011 2 次提交
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由 Ben Hutchings 提交于
Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ben Hutchings 提交于
These drivers share a lot of code, so if we make them modular they should be built into the same module. Therefore, link them together and merge their respective module init and exit functions. Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 3月, 2009 1 次提交
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由 Lennert Buytenhek 提交于
The initial version of the DSA driver only supported a single switch chip per network interface, while DSA-capable switch chips can be interconnected to form a tree of switch chips. This patch adds support for multiple switch chips on a network interface. An example topology for a 16-port device with an embedded CPU is as follows: +-----+ +--------+ +--------+ | |eth0 10| switch |9 10| switch | | CPU +----------+ +-------+ | | | | chip 0 | | chip 1 | +-----+ +---++---+ +---++---+ || || || || ||1000baseT ||1000baseT ||ports 1-8 ||ports 9-16 This requires a couple of interdependent changes in the DSA layer: - The dsa platform driver data needs to be extended: there is still only one netdevice per DSA driver instance (eth0 in the example above), but each of the switch chips in the tree needs its own mii_bus device pointer, MII management bus address, and port name array. (include/net/dsa.h) The existing in-tree dsa users need some small changes to deal with this. (arch/arm) - The DSA and Ethertype DSA tagging modules need to be extended to use the DSA device ID field on receive and demultiplex the packet accordingly, and fill in the DSA device ID field on transmit according to which switch chip the packet is heading to. (net/dsa/tag_{dsa,edsa}.c) - The concept of "CPU port", which is the switch chip port that the CPU is connected to (port 10 on switch chip 0 in the example), needs to be extended with the concept of "upstream port", which is the port on the switch chip that will bring us one hop closer to the CPU (port 10 for both switch chips in the example above). - The dsa platform data needs to specify which ports on which switch chips are links to other switch chips, so that we can enable DSA tagging mode on them. (For inter-switch links, we always use non-EtherType DSA tagging, since it has lower overhead. The CPU link uses dsa or edsa tagging depending on what the 'root' switch chip supports.) This is done by specifying "dsa" for the given port in the port array. - The dsa platform data needs to be extended with information on via which port to reach any given switch chip from any given switch chip. This info is specified via the per-switch chip data struct ->rtable[] array, which gives the nexthop ports for each of the other switches in the tree. For the example topology above, the dsa platform data would look something like this: static struct dsa_chip_data sw[2] = { { .mii_bus = &foo, .sw_addr = 1, .port_names[0] = "p1", .port_names[1] = "p2", .port_names[2] = "p3", .port_names[3] = "p4", .port_names[4] = "p5", .port_names[5] = "p6", .port_names[6] = "p7", .port_names[7] = "p8", .port_names[9] = "dsa", .port_names[10] = "cpu", .rtable = (s8 []){ -1, 9, }, }, { .mii_bus = &foo, .sw_addr = 2, .port_names[0] = "p9", .port_names[1] = "p10", .port_names[2] = "p11", .port_names[3] = "p12", .port_names[4] = "p13", .port_names[5] = "p14", .port_names[6] = "p15", .port_names[7] = "p16", .port_names[10] = "dsa", .rtable = (s8 []){ 10, -1, }, }, }, static struct dsa_platform_data pd = { .netdev = &foo, .nr_switches = 2, .sw = sw, }; Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NGary Thomas <gary@mlbassoc.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 2月, 2009 1 次提交
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由 Harvey Harrison 提交于
Base versions handle constant folding now. Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 12月, 2008 1 次提交
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由 Roel Kluin 提交于
Sparse asked whether these could be static. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 10月, 2008 2 次提交
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由 Lennert Buytenhek 提交于
Most of the DSA switches currently in the field do not support the Ethertype DSA tagging format that one of the previous patches added support for, but only the original DSA tagging format. The original DSA tagging format carries the same information as the Ethertype DSA tagging format, but with the difference that it does not have an ethertype field. In other words, when receiving a packet that is tagged with an original DSA tag, there is no way of telling in eth_type_trans() that this packet is in fact a DSA-tagged packet. This patch adds a hook into eth_type_trans() which is only compiled in if support for a switch chip that doesn't support Ethertype DSA is selected, and which checks whether there is a DSA switch driver instance attached to this network device which uses the old tag format. If so, it sets the protocol field to ETH_P_DSA without looking at the packet, so that the packet ends up in the right place. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NNicolas Pitre <nico@marvell.com> Tested-by: NPeter van Valderen <linux@ddcrew.com> Tested-by: NDirk Teurlings <dirk@upexia.nl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
Distributed Switch Architecture is a protocol for managing hardware switch chips. It consists of a set of MII management registers and commands to configure the switch, and an ethernet header format to signal which of the ports of the switch a packet was received from or is intended to be sent to. The switches that this driver supports are typically embedded in access points and routers, and a typical setup with a DSA switch looks something like this: +-----------+ +-----------+ | | RGMII | | | +-------+ +------ 1000baseT MDI ("WAN") | | | 6-port +------ 1000baseT MDI ("LAN1") | CPU | | ethernet +------ 1000baseT MDI ("LAN2") | |MIImgmt| switch +------ 1000baseT MDI ("LAN3") | +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4") | | | | +-----------+ +-----------+ The switch driver presents each port on the switch as a separate network interface to Linux, polls the switch to maintain software link state of those ports, forwards MII management interface accesses to those network interfaces (e.g. as done by ethtool) to the switch, and exposes the switch's hardware statistics counters via the appropriate Linux kernel interfaces. This initial patch supports the MII management interface register layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and supports the "Ethertype DSA" packet tagging format. (There is no officially registered ethertype for the Ethertype DSA packet format, so we just grab a random one. The ethertype to use is programmed into the switch, and the switch driver uses the value of ETH_P_EDSA for this, so this define can be changed at any time in the future if the one we chose is allocated to another protocol or if Ethertype DSA gets its own officially registered ethertype, and everything will continue to work.) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NNicolas Pitre <nico@marvell.com> Tested-by: NByron Bradley <byron.bbradley@gmail.com> Tested-by: NTim Ellis <tim.ellis@mac.com> Tested-by: NPeter van Valderen <linux@ddcrew.com> Tested-by: NDirk Teurlings <dirk@upexia.nl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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