- 02 12月, 2009 4 次提交
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由 Dave Airlie 提交于
We really don't need to process every irq that comes in, we only really want to do SW irq processing when we are actually waiting for a fence to pass. I'm not 100% sure this is race free esp on non-MSI systems so it needs some testing. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
This enables the use of interrupts on r6xx/r7xx hardware. Interrupts are implemented via a ring buffer. The GPU adds interrupts vectors to the ring and the host reads them off in the interrupt handler. The interrupt controller requires firmware like the CP. This firmware must be installed and accessble to the firmware loader for interrupts to function. MSIs don't seem to work on my RS780. They work fine on all my discrete cards. I'm not sure about other RS780s or RS880s. I've disabled MSIs on RS780 and RS880, but it would probably be worth checking on some other systems. v2 - fix some checkpatch.pl problems; re-read the disp int status reg if we restart the ih; v3 - remove the irq handler if r600_irq_init() fails; remove spinlock in r600_ih_ring_fini(); move ih rb overflow check to r600_get_ih_wptr(); move irq ack to separate function; Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
If we find a GPU but we can't find its BIOS and it isn't posted, then ignore it. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
rendercheck under kms on r600s was failing due to HDP flushing not happening. This adds HDP flushing to the object wait function for r100->r700 families. rendercheck passes basic tests on r600 with this change. Acked-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 06 11月, 2009 2 次提交
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由 Rafał Miłecki 提交于
Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Lots of cases were wrong or missing. v2: rebased against drm-next Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 04 11月, 2009 2 次提交
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由 Dave Airlie 提交于
The Lenovo W500 laptop hangs inside an SMI on brightness changes, I thought it just needed the VGA disable but it turned out to require slightly more work, setting the MC locations up just like the IGP chip requirements seems to make it all happy again and I can boot and play with brightness. We should probably just do this for all chips and give up the VRAM at 0x0 idea, it never seems to buy us anything but pain. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Immediate readback seems faulty on some chips. I suspect it takes a while to get through the fifo to the actual register backbone. There's no need to read it back, so, just write the driver's copy of the register's value directly. Should fix bug 24535 and possibly 24218 Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 26 10月, 2009 1 次提交
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 16 10月, 2009 1 次提交
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由 Matt Turner 提交于
Signed-off-by: NMatt Turner <mattst88@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 08 10月, 2009 2 次提交
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由 Jerome Glisse 提交于
For AGP to work unmapped access must cover VRAM & AGP as AGP is treated like VRAM by the GPU (ie physical address). This patch properly setup the virtual memory system aperture to cover AGP if AGP is enabled. It seems that there is memory corruption after resume when using AGP (RV770 seems unaffected thought). Version 2 just fix merge issue with updated AGP fallback patch. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
When GPU acceleration is not working with AGP try to fallback to non AGP GART (either PCI or PCIE GART). This should make KMS failure on AGP less painfull. We still need to find out what is wrong when AGP fails but at least user have a lot of more chances to get a working configuration with acceleration. This patch also cleanup R600/RV770 fallback path so they use same code as others asics. Version 2 factorize agp disabling logic to avoid code duplication and bugs. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 02 10月, 2009 5 次提交
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由 Jerome Glisse 提交于
R600 & RV770 family are all using atombios so remove dead code and print an error message if we fail to find a valid atombios. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
When acceleration doesn't work we should free associated memory and stop GPU block responsible for hardware acceleration so we don't waste resource or let think one component of the driver that a GPU feature is working/running while it doesn't actualy work. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
We were calling reset unconditionaly in the startup path this is bad we need to call GPU reset for a good reason as after reset the GPU is in unknown states. To avoid any more bad things to happen we now also unconditionaly reinitialize the GPU after reset. This patch fix few issues reported by different people regarding KMS & R6XX/RV7XX hw. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
This split write back buffer handling into 3 functions, wb_fini for cleanup, wb_enable/wb_disable for enabling/disabling write back used for suspend/resume. This should fix potential issue of letting the write back active before suspending. We need to allocate memory in wb_enable because we can only allocate once GART is running. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
This remove old init path and allow code cleanup, now all hw use the new init path, see top of radeon.h for description of this. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 29 9月, 2009 1 次提交
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由 Jerome Glisse 提交于
Convert the rv515 asic support to new init path also add an explanation in radeon.h about the new init path. There is also few cleanups associated with this change (others asic calling rv515 helper functions). Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@linux.ie>
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- 26 9月, 2009 1 次提交
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由 Alex Deucher 提交于
r6xx and r7xx was missing this. We don't support non-CPU accessible vram yet. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@linux.ie>
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- 21 9月, 2009 1 次提交
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由 Dave Airlie 提交于
VGA arb requires DRM support for non-kms drivers, to turn on/off irqs when disabling the mem/io regions. VGA arb requires KMS support for GPUs where we can turn off VGA decoding. Currently we know how to do this for intel and radeon kms drivers, which allows them to be removed from the arbiter. This patch comes from Fedora rawhide kernel. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 18 9月, 2009 5 次提交
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由 Dave Airlie 提交于
We really don't want to post the card at init, it takes a relatively long time and isn't required, so split the resume path into a startup path called by both init/resume and separate resume entry point to do posting. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
a) don't zero gart table on gart enable b) move pinning shader object into resume path c) unpin shader object on suspend d) set cp ready to false after cp shutdown on suspend. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
Before we use any of VRAM, we need to disable the VGA rendering engine, this render text mode into a graphical framebuffer for scanout, however it does this on vblank, and can end up overwriting the GART table and r600 shader objects. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Michel Dänzer 提交于
Someone on IRC reported problems after commit 95a8f1bf ('drm/radeon/kms: Move radeon_clocks_init() call back after getting VRAM info.'). And indeed, at least some ASIC vram_info hooks use the clock info obtained by radeon_get_clock_info(). So, move that call out of radeon_clocks_init(), ahead of the radeon_vram_info() call. [airlied - fixup missing r600/rv770 calls] Signed-off-by: NMichel Dänzer <daenzer@vmware.com> Signed-off-by: NDave Airlie <airlied@redhat.com> drm/radeon/kms: fix get clock info calls for r600/rv770 init path. These were missed when it got split out. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Jerome Glisse 提交于
Userspace can query if acceleration is working or not true get info ioctl and could fallback to software if for some reason kernel failed to initialize KMS. This should allow to give a working KMS setup in all case (even with non functionning accel). Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 15 9月, 2009 1 次提交
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由 Jerome Glisse 提交于
GART static one time initialization was mixed up with GART enabling/disabling which could happen several time for instance during suspend/resume cycles. This patch splits all GART handling into 4 differents function. gart_init is for one time initialization, gart_deinit is called upon module unload to free resources allocated by gart_init, gart_enable enable the GART and is intented to be call after first initialization and at each resume cycle or reset cycle. Finaly gart_disable stop the GART and is intended to be call at suspend time or when unloading the module. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 14 9月, 2009 1 次提交
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由 Jerome Glisse 提交于
radeon_share.h was begining to give problem with include order in respect of radeon.h. It's easier and also i think cleaner to move what was in radeon_share.h into radeon.h. At the same time use the extern keyword for function shared accross the module. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 08 9月, 2009 1 次提交
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由 Jerome Glisse 提交于
This adds the r600 KMS + CS support to the Linux kernel. The r600 TTM support is quite basic and still needs more work esp around using interrupts, but the polled fencing should work okay for now. Also currently TTM is using memcpy to do VRAM moves, the code is here to use a 3D blit to do this, but isn't fully debugged yet. Authors: Alex Deucher <alexdeucher@gmail.com> Dave Airlie <airlied@redhat.com> Jerome Glisse <jglisse@redhat.com> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 29 7月, 2009 1 次提交
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由 Dave Airlie 提交于
If an rn50/r100/m6/m7 GPU has < 64MB RAM, i.e. 8/16/32, the aperture used to calculate the MC_FB_LOCATION needs to be worked out from the CONFIG_APER_SIZE register, and not the actual vram size. TTM VRAM size was also being initialised wrong, use actual vram size to initialise it. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 15 6月, 2009 1 次提交
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由 Jerome Glisse 提交于
Add kernel modesetting support to radeon driver, use the ttm memory manager to manage memory and DRM/GEM to provide userspace API. In order to avoid backward compatibility issue and to allow clean design and code the radeon kernel modesetting use different code path than old radeon/drm driver. When kernel modesetting is enabled the IOCTL of radeon/drm driver are considered as invalid and an error message is printed in the log and they return failure. KMS enabled userspace will use new API to talk with the radeon/drm driver. The new API provide functions to create/destroy/share/mmap buffer object which are then managed by the kernel memory manager (here TTM). In order to submit command to the GPU the userspace provide a buffer holding the command stream, along this buffer userspace have to provide a list of buffer object used by the command stream. The kernel radeon driver will then place buffer in GPU accessible memory and will update command stream to reflect the position of the different buffers. The kernel will also perform security check on command stream provided by the user, we want to catch and forbid any illegal use of the GPU such as DMA into random system memory or into memory not owned by the process supplying the command stream. This part of the code is still incomplete and this why we propose that patch as a staging driver addition, future security might forbid current experimental userspace to run. This code support the following hardware : R1XX,R2XX,R3XX,R4XX,R5XX (radeon up to X1950). Works is underway to provide support for R6XX, R7XX and newer hardware (radeon from HD2XXX to HD4XXX). Authors: Jerome Glisse <jglisse@redhat.com> Dave Airlie <airlied@redhat.com> Alex Deucher <alexdeucher@gmail.com> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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