1. 26 6月, 2008 3 次提交
  2. 25 6月, 2008 2 次提交
  3. 12 6月, 2008 3 次提交
    • A
      [IA64] Update check_sal_cache_flush to use platform_send_ipi() · 3463a93d
      Alex Chiang 提交于
      check_sal_cache_flush is used to detect broken firmware that drops
      pending interrupts.
      
      The old implementation schedules a timer interrupt for itself in
      the future by getting the current value of the Interval Timer
      Counter + 1000 cycles, waits for the interrupt to be pended, calls
      SAL_CACHE_FLUSH, and finally checks to see if the interrupt is
      still pending.
      
      This implementation can cause problems for virtual machine code if
      the process of scheduling the timer interrupt takes more than 1000
      cycles; the virtual machine can end up sleeping for several hundred
      years while waiting for the ITC to wrap around.
      
      The fix is to use platform_send_ipi. The processor will still send
      an interrupt to itself, using the IA64_IPI_DM_INT delivery mode,
      which causes the IPI to look like an external interrupt. The rest
      of the SAL_CACHE_FLUSH + checking to see if the interrupt is still
      pending remains unchanged.
      
      This fix has been boot tested successfully on:
      
      	- intel tiger2
      	- hp rx6600
      	- hp rx5670
      
      The rx5670 has known buggy firmware, where SAL_CACHE_FLUSH drops
      pending interrupts. A boot test on this machine showed this message
      on the console:
      
      SAL: SAL_CACHE_FLUSH drops interrupts; PAL_CACHE_FLUSH will be used instead
      
      Which proves that the self-inflicted IPI approach is viable. And
      as expected, the other tested platforms correctly did not display
      the warning.
      Signed-off-by: NAlex Chiang <achiang@hp.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      3463a93d
    • F
      ACPI: handle invalid ACPI SLIT table · 39b8931b
      Fenghua Yu 提交于
      This is a SLIT sanity checking patch.  It moves slit_valid() function to
      generic ACPI code and does sanity checking for both x86 and ia64.  It sets up
      node_distance with LOCAL_DISTANCE and REMOTE_DISTANCE when hitting invalid
      SLIT table on ia64.  It also cleans up unused variable localities in
      acpi_parse_slit() on x86.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      39b8931b
    • S
      [IA64] perfmon: fix async exit bug · 83014699
      stephane eranian 提交于
      Move the cleanup of the async queue to the close callback from the flush
      callback. This avoids losing asynchronous overflow notifications when
      the file descriptor is shared by multiple processes and one terminates.
      Signed-off-by: NStephane Eranian <eranian@gmail.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      83014699
  4. 28 5月, 2008 1 次提交
    • T
      [IA64] Workaround for RSE issue · 4dcc29e1
      Tony Luck 提交于
      Problem: An application violating the architectural rules regarding
      operation dependencies and having specific Register Stack Engine (RSE)
      state at the time of the violation, may result in an illegal operation
      fault and invalid RSE state.  Such faults may initiate a cascade of
      repeated illegal operation faults within OS interruption handlers.
      The specific behavior is OS dependent.
      
      Implication: An application causing an illegal operation fault with
      specific RSE state may result in a series of illegal operation faults
      and an eventual OS stack overflow condition.
      
      Workaround: OS interruption handlers that switch to kernel backing
      store implement a check for invalid RSE state to avoid the series
      of illegal operation faults.
      
      The core of the workaround is the RSE_WORKAROUND code sequence
      inserted into each invocation of the SAVE_MIN_WITH_COVER and
      SAVE_MIN_WITH_COVER_R19 macros.  This sequence includes hard-coded
      constants that depend on the number of stacked physical registers
      being 96.  The rest of this patch consists of code to disable this
      workaround should this not be the case (with the presumption that
      if a future Itanium processor increases the number of registers, it
      would also remove the need for this patch).
      
      Move the start of the RBS up to a mod32 boundary to avoid some
      corner cases.
      
      The dispatch_illegal_op_fault code outgrew the spot it was
      squatting in when built with this patch and CONFIG_VIRT_CPU_ACCOUNTING=y
      Move it out to the end of the ivt.
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      4dcc29e1
  5. 17 5月, 2008 1 次提交
  6. 15 5月, 2008 8 次提交
  7. 02 5月, 2008 4 次提交
  8. 01 5月, 2008 4 次提交
  9. 30 4月, 2008 4 次提交
  10. 29 4月, 2008 2 次提交
  11. 22 4月, 2008 4 次提交
    • J
      [IA64] minor irq handler cleanups · 9010eff0
      Jeff Garzik 提交于
      - remove unused 'irq' argument from pfm_do_interrupt_handler()
      
      - remove pointless cast to void*
      
      - add KERN_xxx prefix to printk()
      
      - remove braces around singleton C statement
      
      - in tioce_provider.c, start tioce_dma_consistent() and
        tioce_error_intr_handler() function declarations in column 0
      
      This change's main purpose is to prepare for the patchset in
      jgarzik/misc-2.6.git#irq-remove, that explores removal of the
      never-used 'irq' argument in each interrupt handler.
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      9010eff0
    • H
      [IA64] simplify notify hooks in mca.c · 4fa2f0e6
      Hidetoshi Seto 提交于
      There are many notify_die() and almost all take same style with
      ia64_mca_spin().  This patch defines macros and replace them all,
      to reduce lines and to improve readability.
      Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      4fa2f0e6
    • H
      [IA64] do notify DIE_MCA_MONARCH_PROCESS for each monarchs · 284e5427
      Hidetoshi Seto 提交于
      There are 3 hooks in MCA handler, but this DIE_MCA_MONARCH_PROCESS
      event does not notified other than for the first monarch.
      Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      284e5427
    • H
      [IA64] disable interrupts on exit of ia64_trace_syscall · 38477ad7
      Hidetoshi Seto 提交于
      While testing with CONFIG_VIRT_CPU_ACCOUNTING=y, I found that
      I occasionally get very huge system time in some threads.
      
      So I dug the issue and finally noticed that it was caused
      because of an interrupt which interrupt in the following window:
      
      > [arch/ia64/kernel/entry.S: (!CONFIG_PREEMPT && CONFIG_VIRT_CPU_ACCOUNTING)]
      >
      > ENTRY(ia64_leave_syscall)
      >    :
      > (pUStk) rsm psr.i
      >         cmp.eq pLvSys,p0=r0,r0          // pLvSys=1: leave from syscall
      > (pUStk) cmp.eq.unc p6,p0=r0,r0          // p6 <- pUStk
      > .work_processed_syscall:
      >         adds r2=PT(LOADRS)+16,r12
      > (pUStk) mov.m r22=ar.itc                        // fetch time at leave
      >         adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
      >         ;;
      > <<< window: from here >>>
      > (p6)    ld4 r31=[r18]  // load current_thread_info()->flags
      >         ld8 r19=[r2],PT(B6)-PT(LOADRS)
      >         adds r3=PT(AR_BSPSTORE)+16,r12
      >         ;;
      >         mov r16=ar.bsp
      >         ld8 r18=[r2],PT(R9)-PT(B6)
      > (p6)    and r15=TIF_WORK_MASK,r31  // any work other than TIF_SYSCALL_TRACE?
      >         ;;
      >         ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE)
      > (p6)    cmp4.ne.unc p6,p0=r15, r0               // any special work pending?
      > (p6)    br.cond.spnt .work_pending_syscall
      >         ;;
      >         ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
      >         ld8 r11=[r3],PT(CR_IIP)-PT(R11)
      > (pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
      >         ;;
      >         invala
      > <<< window: to here >>>
      >         rsm psr.i | psr.ic // turn off interrupts and interruption collection
      
      If pUStk is true, it means we are going to return user mode, hence we fetch
      ar.itc to get time at leave from system.
      It seems that it is not possible to interrupt the window if pUStk is true,
      because interrupts are disabled early.  And also disabling interrupt makes
      sense because it is safe for referring current_thread_info()->flags.
      
      However interrupting the window while pUStk is true was possible.
      The route was:
      ia64_trace_syscall
      -> .work_pending_syscall_end
      -> .work_processed_syscall
      Only in case entering the window from this route, interrupts are enabled
      during in the window even if pUStk is true.  I suppose interrupts must be
      disabled here anyway if pUStk is true.
      I'm not sure but afraid that what kind of bad effect were there, other
      than crazy system time which I found.
      
      FYI, there was a commit 6f6d7582 that
      points out a bug at same point(exit of ia64_trace_syscall) in 2006.
      It can be said that there was an another bug.
      Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      38477ad7
  12. 19 4月, 2008 1 次提交
  13. 17 4月, 2008 1 次提交
  14. 16 4月, 2008 1 次提交
    • T
      [IA64] kdump: Add crash_save_vmcoreinfo for INIT · 072f042d
      Takao Indoh 提交于
      This patch fixes the problem that kdump by INIT does not work if we use
      makedumpfile. The problem is that after INIT is issued, 2nd kernel
      starts and makedumpfile fails with the following error message.
      
      /proc/vmcore doesn't contain vmcoreinfo.
      '-x' or '-i' must be specified.
      
      makedumpfile Failed.
      
      The cause of this problem is that kernel does not call
      crash_save_vmcoreinfo. When kdump starts by panic or sysrq-trigger,
      crash_save_vmcoreinfo is called by crash_kexec. But this function is not
      called when kdump starts by INIT. The Attached patch fixes this.
      
      This patch just adds crash_save_vmcoreinfo into machine_kdump_on_init so
      that crash_save_vmcoreinfo can be called when kdump starts by INIT.
      I tested this patch with linux-2.6.25-rc9 and I confirmed it worked.
      Signed-off-by: NTakao Indoh <indou.takao@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      072f042d
  15. 12 4月, 2008 1 次提交
    • Z
      [IA64] Fix NUMA configuration issue · 98075d24
      Zoltan Menyhart 提交于
      There is a NUMA memory configuration issue in 2.6.24:
      
      A 2-node machine of ours has got the following memory layout:
      
      Node 0:	0 - 2 Gbytes
      Node 0:	4 - 8 Gbytes
      Node 1:	8 - 16 Gbytes
      Node 0:	16 - 18 Gbytes
      
      "efi_memmap_init()" merges the three last ranges into one.
      
      "register_active_ranges()" is called as follows:
      
      efi_memmap_walk(register_active_ranges, NULL);
      
      i.e. once for the 4 - 18 Gbytes range. It picks up the node
      number from the start address, and registers all the memory for
      the node #0.
      
      "register_active_ranges()" should be called as follows to
      make sure there is no merged address range at its entry:
      
      efi_memmap_walk(filter_memory, register_active_ranges);
      
      "filter_memory()" is similar to "filter_rsvd_memory()",
      but the reserved memory ranges are not filtered out.
      Signed-off-by: NZoltan Menyhart <Zoltan.Menyhart@bull.net>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      98075d24