1. 06 7月, 2012 2 次提交
  2. 02 7月, 2012 4 次提交
    • M
      powerpc/kvm: sldi should be sld · 2f584a14
      Michael Neuling 提交于
      Since we are taking a registers, this should never have been an sldi.
      Talking to paulus offline, this is the correct fix.
      
      Was introduced by:
       commit 19ccb76a
       Author: Paul Mackerras <paulus@samba.org>
       Date:   Sat Jul 23 17:42:46 2011 +1000
      
      Talking to paulus, this shouldn't be a literal.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      CC: <stable@kernel.org> [v3.2+]
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2f584a14
    • A
      powerpc/xmon: Use cpumask iterator to avoid warning · bc1d7702
      Anton Blanchard 提交于
      We have a bug report where the kernel hits a warning in the cpumask
      code:
      
      WARNING: at include/linux/cpumask.h:107
      
      Which is:
              WARN_ON_ONCE(cpu >= nr_cpumask_bits);
      
      The backtrace is:
              cpu_cmd
              cmds
              xmon_core
              xmon
              die
      
      xmon is iterating through 0 to NR_CPUS. I'm not sure why we are still
      open coding this but iterating above nr_cpu_ids is definitely a bug.
      
      This patch iterates through all possible cpus, in case we issue a
      system reset and CPUs in an offline state call in.
      
      Perhaps the old code was trying to handle CPUs that were in the
      partition but were never started (eg kexec into a kernel with an
      nr_cpus= boot option). They are going to die way before we get into
      xmon since we haven't set any kernel state up for them.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      CC: <stable@kernel.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      bc1d7702
    • B
      x86, microcode: Make reload interface per system · 3d8986bc
      Borislav Petkov 提交于
      The reload interface should be per-system so that a full system ucode
      reload happens (on each core) when doing
      
      echo 1 > /sys/devices/system/cpu/microcode/reload
      
      Move it to the cpu subsys directory instead of it being per-cpu.
      
      Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      Link: http://lkml.kernel.org/r/1340280437-7718-3-git-send-email-bp@amd64.orgSigned-off-by: NH. Peter Anvin <hpa@zytor.com>
      3d8986bc
    • B
      x86, microcode: Sanitize per-cpu microcode reloading interface · c9fc3f77
      Borislav Petkov 提交于
      Microcode reloading in a per-core manner is a very bad idea for both
      major x86 vendors. And the thing is, we have such interface with which
      we can end up with different microcode versions applied on different
      cores of an otherwise homogeneous wrt (family,model,stepping) system.
      
      So turn off the possibility of doing that per core and allow it only
      system-wide.
      
      This is a minimal fix which we'd like to see in stable too thus the
      more-or-less arbitrary decision to allow system-wide reloading only on
      the BSP:
      
      $ echo 1 > /sys/devices/system/cpu/cpu0/microcode/reload
      ...
      
      and disable the interface on the other cores:
      
      $ echo 1 > /sys/devices/system/cpu/cpu23/microcode/reload
      -bash: echo: write error: Invalid argument
      
      Also, allowing the reload only from one CPU (the BSP in
      that case) doesn't allow the reload procedure to degenerate
      into an O(n^2) deal when triggering reloads from all
      /sys/devices/system/cpu/cpuX/microcode/reload sysfs nodes
      simultaneously.
      
      A more generic fix will follow.
      
      Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      Link: http://lkml.kernel.org/r/1340280437-7718-2-git-send-email-bp@amd64.orgSigned-off-by: NH. Peter Anvin <hpa@zytor.com>
      Cc: <stable@vger.kernel.org>
      c9fc3f77
  3. 01 7月, 2012 2 次提交
  4. 29 6月, 2012 7 次提交
  5. 28 6月, 2012 2 次提交
  6. 27 6月, 2012 2 次提交
    • J
      ARM: OMAP4470: Fix OMAP4470 boot failure · e90b833e
      Jon Hunter 提交于
      OMAP4470 currently fails to boot, printing various messages such as ...
      
      omap_hwmod: mpu: cannot clk_get main_clk dpll_mpu_m2_ck
      omap_hwmod: mpu: cannot _init_clocks
      ------------[ cut here ]------------
      WARNING: at arch/arm/mach-omap2/omap_hwmod.c:2062 _init+0x2a0/0x2e4()
      omap_hwmod: mpu: couldn't init clocks
      Modules linked in:
      [<c001c7fc>] (unwind_backtrace+0x0/0xf4) from [<c0043c64>] (warn_slowpath_common+0x4c/0x64)
      [<c0043c64>] (warn_slowpath_common+0x4c/0x64) from [<c0043d10>] (warn_slowpath_fmt+0x30/0x40)
      [<c0043d10>] (warn_slowpath_fmt+0x30/0x40) from [<c0674208>] (_init+0x2a0/0x2e4)
      [<c0674208>] (_init+0x2a0/0x2e4) from [<c067428c>] (omap_hwmod_setup_one+0x40/0x60)
      [<c067428c>] (omap_hwmod_setup_one+0x40/0x60) from [<c0674280>] (omap_hwmod_setup_one+0x34/0x60)
      [<c0674280>] (omap_hwmod_setup_one+0x34/0x60) from [<c06726f4>] (omap_dm_timer_init_one+0x30/0x250)
      [<c06726f4>] (omap_dm_timer_init_one+0x30/0x250) from [<c0672930>] (omap2_gp_clockevent_init+0x1c/0x108)
      [<c0672930>] (omap2_gp_clockevent_init+0x1c/0x108) from [<c0672c60>] (omap4_timer_init+0x10/0x5c)
      [<c0672c60>] (omap4_timer_init+0x10/0x5c) from [<c066c418>] (time_init+0x20/0x30)
      [<c066c418>] (time_init+0x20/0x30) from [<c0668814>] (start_kernel+0x1b0/0x304)
      [<c0668814>] (start_kernel+0x1b0/0x304) from [<80008044>] (0x80008044)
      ---[ end trace 1b75b31a2719ed1c ]---
      
      The problem is that currently none of the clocks are being registered for
      OMAP4470 devices and so on boot-up no clocks can be found and the kernel panics.
      
      This fix allows the kernel to boot without failure using a simple RAMDISK file
      system on OMAP4470 blaze board.
      
      Per feedback from Paul and Benoit the 4470 clock data is incomplete for new
      modules such as the 2D graphics block that has been added to the 4470.
      Therefore add a warning to indicate that the clock data is incomplete.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      [tony@atomide.com: updated comments]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e90b833e
    • S
      ARM: EXYNOS: Fix EXYNOS_DEV_DMA Kconfig entry · 58c553d4
      Sachin Kamat 提交于
      Commit 20ef9e08 ("ARM: EXYNOS: Support DMA for EXYNOS5250 SoC")
      renamed EXYNOS4_DEV_DMA to EXYNOS_DEV_DMA. But some machine entries
      still had EXYNOS4_DEV_DMA. Changed them to EXYNOS_DEV_DMA.
      Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      58c553d4
  7. 26 6月, 2012 4 次提交
  8. 25 6月, 2012 4 次提交
  9. 24 6月, 2012 3 次提交
  10. 23 6月, 2012 2 次提交
    • P
      ARM: shmobile: r8a7779: Route all interrupts to ARM · 86f887c1
      Phil Edworthy 提交于
      Without this, the interrupts for I2C, VIN, GPIO, SDHC, HSCIF and
      HPB-DMAC are sent to the SH processor.
      Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
      Acked-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      86f887c1
    • D
      ARM: 7428/1: Prevent KALLSYM size mismatch on ARM. · 9973290c
      David Brown 提交于
      ARM builds seem to be plagued by an occasional build error:
      
          Inconsistent kallsyms data
          This is a bug - please report about it
          Try "make KALLSYMS_EXTRA_PASS=1" as a workaround
      
      The problem has to do with alignment of some sections by the linker.
      The kallsyms data is built in two passes by first linking the kernel
      without it, and then linking the kernel again with the symbols
      included.  Normally, this just shifts the symbols, without changing
      their order, and the compression used by the kallsyms gives the same
      result.
      
      On non SMP, the per CPU data is empty.  Depending on the where the
      alignment ends up, it can come out as either:
      
         +-------------------+
         | last text segment |
         +-------------------+
         /* padding */
         +-------------------+     <- L1_CACHE_BYTES alignemnt
         | per cpu (empty)   |
         +-------------------+
      __per_cpu_end:
         /* padding */
      __data_loc:
         +-------------------+     <- THREAD_SIZE alignment
         | data              |
         +-------------------+
      
      or
      
         +-------------------+
         | last text segment |
         +-------------------+
         /* padding */
         +-------------------+     <- L1_CACHE_BYTES alignemnt
         | per cpu (empty)   |
         +-------------------+
      __per_cpu_end:
         /* no padding */
      __data_loc:
         +-------------------+     <- THREAD_SIZE alignment
         | data              |
         +-------------------+
      
      if the alignment satisfies both.  Because symbols that have the same
      address are sorted by 'nm -n', the second case will be in a different
      order than the first case.  This changes the compression, changing the
      size of the kallsym data, causing the build failure.
      
      The KALLSYMS_EXTRA_PASS=1 workaround usually works, but it is still
      possible to have the alignment change between the second and third
      pass.  It's probably even possible for it to never reach a fixedpoint.
      
      The problem only occurs on non-SMP, when the per-cpu data is empty,
      and when the data segment has alignment (and immediately follows the
      text segments).  Fix this by only including the per_cpu section on
      SMP, when it is not empty.
      Signed-off-by: NDavid Brown <davidb@codeaurora.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      9973290c
  11. 22 6月, 2012 6 次提交
    • R
      ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled · dc57aef5
      Ricardo Neri 提交于
      As per the OMAP4 documentation, audio over HDMI must be transmitted in
      no-idle mode. This patch adds the HWMOD_SWSUP_SIDLE so that omap_hwmod uses
      no-idle/force-idle settings instead of smart-idle mode.
      
      This is required as the DSS interface clock is used as functional clock
      for the HDMI wrapper audio FIFO. If no-idle mode is not used, audio could
      be choppy, have bad quality or not be audible at all.
      Signed-off-by: NRicardo Neri <ricardo.neri@ti.com>
      [b-cousson@ti.com: Update the subject and align the .flags
      location with the script template]
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      dc57aef5
    • P
      ARM: OMAP2+: mux: fix sparse warning · 65e25976
      Paul Walmsley 提交于
      Commit bbd707ac ("ARM: omap2: use
      machine specific hook for late init") resulted in the addition of this
      sparse warning:
      
      arch/arm/mach-omap2/mux.c:791:12: warning: symbol 'omap_mux_late_init' was not declared. Should it be static?
      
      Fix by including the header file containing the prototype.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Tony Lindgren <tony@atomide.com>
      65e25976
    • P
      ARM: OMAP2+: CM: increase the module disable timeout · b8f15b7e
      Paul Walmsley 提交于
      Increase the timeout for disabling an IP block to five milliseconds.
      This is to handle the usb_host_fs idle latency, which takes almost
      four milliseconds after a host controller reset.
      
      This is the second of two patches needed to resolve the following
      boot warning:
      
      omap_hwmod: usb_host_fs: _wait_target_disable failed
      
      Thanks to Sergei Shtylyov <sshtylyov@mvista.com> for finding
      an unrelated hunk in a previous version of this patch.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Sergei Shtylyov <sshtylyov@mvista.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      b8f15b7e
    • P
      ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks · 9a47d32d
      Paul Walmsley 提交于
      Until the OMAP4 code is converted to disable the use of the clock
      framework-based clockdomain enable/disable sequence, any clock used as
      a hwmod main_clk must have a clockdomain associated with it.  This
      patch populates some clock structure clockdomain names to resolve the
      following warnings during kernel init:
      
      omap_hwmod: dpll_mpu_m2_ck: missing clockdomain for dpll_mpu_m2_ck.
      omap_hwmod: trace_clk_div_ck: missing clockdomain for trace_clk_div_ck.
      omap_hwmod: l3_div_ck: missing clockdomain for l3_div_ck.
      omap_hwmod: ddrphy_ck: missing clockdomain for ddrphy_ck.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      9a47d32d
    • P
      ARM: OMAP4: hwmod data: fix 32k sync timer idle modes · 252a4c54
      Paul Walmsley 提交于
      The 32k sync timer IP block target idle modes in the hwmod data are
      incorrect.  The IP block does not support any smart-idle modes.
      Update the data to reflect the correct modes.
      
      This problem was initially identified and a diff fragment posted to
      the lists by Benoît Cousson <b-cousson@ti.com>.  A patch description
      bug in the first version was also identified by Benoît.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      252a4c54
    • D
      ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby · 561038f0
      Djamil Elaidi 提交于
      If an IP is configured in Smart-Standby-Wakeup, when disabling wakeup feature the
      IP will not go back to Smart-Standby, but will remain in Smart-Standby-Wakeup.
      Signed-off-by: NDjamil Elaidi <d-elaidi@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      561038f0
  12. 21 6月, 2012 2 次提交