AXP803 is a new PMIC chip produced by X-Powers, usually paired with A64
via RSB bus. The PMIC itself is like AXP288, but with RSB support and
dedicated VBUS and ACIN.

Add support for it in the axp20x mfd driver.

Currently only power key function is supported.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

AXP803 is a PMIC produced by Shenzhen X-Powers, with either I2C or RSB
bus.

Add a compatible for it.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

In the binding documentation of AXP20X mfd, the compatible strings used
to be listed for three per line, which leads to some mess when trying to
add AXP803 compatible string (as we have already AXP806 and AXP809
compatibles, which is after AXP803 in ascending order).

Make the compatible strings one per line, so that inserting a new
compatible string will be directly a new line.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

unction devm_regmap_init_i2c() returns an ERR_PTR on errors, and its
return value should be checked before it is dereferenced. However, in
function intel_soc_pmic_i2c_probe(), the return value of function
devm_regmap_init_i2c() is used without validation. This patch fixes it.
Signed-off-by: NPan Bian <bianpan2016@163.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Since

commit e6229bec ("rtc: make rtc_update_irq callable with irqs enabled")

rtc_update_irq() is callable with irqs enabled, see the rtc drivers.
So update this accordingly.
Signed-off-by: NMartin Kepplinger <martin.kepplinger@ginzinger.com>
Acked-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The idle mode needs to be only disabled for UTMIAUTOIDLE while
ULPIAUTOIDLE can be enabled.

This matches the TLL_CHANNEL_CONF_i register configuration for ehci-tll
in the Motorola Linux kernel tree for Wrigley 3G LTE modem on droid 4
and the modem still stays responsive.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Acked-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Commit 16fa3dc7 ("mfd: omap-usb-tll: HOST TLL platform driver")
added support for USB TLL, but uses OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
bit the wrong way. The comments in the code are correct, but the inverted
use of OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF causes the register to be
enabled instead of disabled unlike what the comments say.

Without this change the Wrigley 3G LTE modem on droid 4 EHCI bus can
be only pinged few times before it stops responding.

Fixes: 16fa3dc7 ("mfd: omap-usb-tll: HOST TLL platform driver")
Signed-off-by: NTony Lindgren <tony@atomide.com>
Acked-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Fixed a small spelling mistake ("updat" -> "update") in an error message.
Signed-off-by: NWillis Monroe <willismonroe@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Like Intel Apollo Lake, Gemini Lake exposes the serial SPI flash device BAR
through hidden P2SB PCI device. We use the same mechanism than Apollo Lake
to read the BAR and pass it to the driver.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The hi655x is a PMIC with regulator but also provides a clock for the WiFi
and the bluetooth which is missing in the current implementation.

Add the clock cell so it can be used in the next patch via the dts.
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Crystal Cove and Whiskey Cove are two different PMICs which are
installed on Intel Atom SoC based platforms.

Moreover there are two independent drivers that by some reason were
supposed (*) to get into one kernel module.

Fix the mess by clarifying Kconfig option for Crystal Cove and split
Whiskey Cove out of it.

(*) It looks like the configuration was never tested with
    INTEL_SOC_PMIC=n. The line in Makefile is actually wrong.

Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> (supporter:ACPI)
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Convert exisitng lpass-suspend/resume callbacks into runtime PM callbacks.
This way Exynos LPASS driver will be ready for use with power domains
enabled. LPASS will be runtime resumed/suspended as a result of its child
devices runtime PM transitions.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Disable device on driver remove and release allocated regmap.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Acked-for-MFD-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Exynos LPASS requires some clocks to be enabled to make any access to its
registers. This patch adds code for handling such clocks. For current set
of registers it is enough to keep sfr0_ctrl clock enabled. Till now it
worked only because those clocks were enabled by bootloader and driver
probe() happened before they were disabled by clock core because of lack
of users. Handling those clocks is also needed to make it possible to
enable support for audio power domain.

This patch requires adding sfr0_ctrl clock to device tree.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-for-MFD-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Pad retention should be controlled from pin control driver, so remove it
from Exynos LPASS driver. After this change, no more access to PMU regmap
is needed, so remove also the code for handling PMU regmap.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-for-MFD-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The X-Powers AXP20X and AXP22X PMICs have multiple ADCs. They expose the
battery voltage, battery charge and discharge currents, AC-in and VBUS
voltages and currents, 2 GPIOs muxable in ADC mode and PMIC temperature.

This adds support for most of AXP20X and AXP22X ADCs.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NJonathan Cameron <jic23@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The cpcap INTS registers are for getting the value of the line,
not for configuring the type.

Fixes: 56e1d40d ("mfd: cpcap: Add minimal support")
Reviewed-By: NSebastian Reichel <sre@kernel.org>
Tested-by: NSebastian Reichel <sre@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

We should use ack_invert as the int_read_and_clear() in the Motorola
kernel tree does "ireg_val & ~mreg_val" before writing to the mask
register.

Fixes: 56e1d40d ("mfd: cpcap: Add minimal support")
Tested-by: NSebastian Reichel <sre@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

I made a mistake assuming the device tree configuration for interrupt
triggering was somehow passed to the SPI device but it's not.

In the Motorola Linux kernel tree CPCAP PMIC is configured as a rising
edge triggered interrupt, but then then it's interrupt handler keeps
looping until the GPIO line goes down. So the CPCAP interrupt is clearly
a level interrupt and not an edge interrupt.

Earlier when I tried to configure it as level interrupt using the
device tree, I did not account that the triggering only gets passed
to the SPI core and it also needs to be specified in the CPCAP driver
when we do devm_regmap_add_irq_chip().

Fixes: 56e1d40d ("mfd: cpcap: Add minimal support")
Signed-off-by: NTony Lindgren <tony@atomide.com>
Acked-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch removes the sun4i touchscreen controller binding
documentation since it has been merged with the sun4i GPADC binding
documentation.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch adds documentation for the A33 GPADC binding.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The X-Powers AXP20X and AXP22X PMICs can have a battery as power supply.

This patch adds the AXP20X/AXP22X battery driver to the MFD cells of the
AXP209, AXP221 and AXP223 MFD.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

MFD support for DA9061 is provided as part of the DA9062 device driver.

The registers header file adds two new chip variant IDs defined in DA9061
and DA9062 hardware. The core header file adds new software enumerations
for listing the valid DA9061 IRQs and a da9062_compatible_types enumeration
for distinguishing between DA9061/62 devices in software.

The core source code adds a new .compatible of_device_id entry. This is
extended from DA9062 to support both "dlg,da9061" and "dlg,da9062". The
.data entry now holds a reference to the enumerated device type.

A new regmap_irq_chip model is added for DA9061 and this supports the new
list of regmap_irq entries. A new mfd_cell da9061_devs[] array lists the
new sub system components for DA9061. Support is added for a new DA9061
regmap_config which lists the correct readable, writable and volatile
ranges for this chip.

The probe function uses the device tree compatible string to switch on the
da9062_compatible_types and configure the correct mfd cells, irq chip and
regmap config.

Kconfig is updated to reflect support for DA9061 and DA9062 PMICs.
Signed-off-by: NSteve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Extend existing DA9062 binding information to include the DA9061 PMIC for
MFD core and regulators.

Add a da9062-onkey link to the existing onkey binding file.

Add a da9062-thermal link to the new temperature monitoring binding file.

Delete the da9062-watchdog section and replace it with a link to the new
DA9061/62 binding information file.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NSteve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

GPIO bits clearing on pins assigned to STMPE1600
had no effects due to missing "clear registers"
settings within stmpe1600_regs[].
STMPE1600 does not have dedicated "clear registers",
but single "set/clear registers", hence stmpe1600_regs[]
"clear registers" (STMPE_IDX_GPCR_XXX) must be set to
same value as "set registers" (STMPE_IDX_GPSR_XXX), ie
STMPE1600_REG_GPSR_XXX.
Signed-off-by: NHugues Fruchet <hugues.fruchet@st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

In the following code block, BXTWC_DEVICE1_ADDR value is
already fixed and hence there no need to check for
if (!i2c_addr) in every ipc read/write calls. Even if this
check is required it can be moved to probe function.

i2c_addr = BXTWC_DEVICE1_ADDR;
if (!i2c_addr) {
	dev_err(pmic->dev, "I2C address not set\n");
	return -EINVAL;
}

This patch remove this extra check and adds some NULL
parameter checks.
Signed-off-by: NKuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Add a ->resume() hook to make sure the EBI dev configs are correctly
restored when resuming the platform.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

ebid->numcs is never assigned, set it to numcs after allocating the
EBI dev object.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The EBI block is not only available on at91 SoCs, but also on avr32 ones.
Change the structure and function prefixes from at91_ebi to atmel_ebi to
match this fact and make the prefix and driver name consistent.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

All macros prefixed with AT91[SAM9]_SMC have been replaced by equivalent
definitions prefixed with ATMEL_SMC, and the at91sam9_smc_xxxx() helpers
are no longer used.
Drop these definitions before someone starts using them again.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Turn the ->ebi_csa reg field into a simple offset that can be used with
with the matrix regmap. Using reg fields was overkill for this use case.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

New helpers/macros have been to atmel-smc.h introduced to simplify SMC
regs manipulation. Rework the code to use those helpers, and simplify
the ->xlate_config(), ->get_config() and ->apply_config() implementations.

SMC configs are now stored in a struct atmel_smc_cs_conf object that
directly contains registers values, which should help implementing
->suspend()/->resume() hooks.

We can also get rid of those regmap fields (and the associated ->init()
hook) which are not longer needed thanks to the
atmel_[h]smc_cs_conf_{apply,get}() helpers.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

These new helpers + macro definitions are meant to replace the old ones
which are unpractical to use.

Note that the macros and function prefixes have been intentionally
changed to ATMEL_[H]SMC_XX and atmel_[h]smc_ to reflect the fact that
this IP is also embedded in avr32 SoCs (and not only in at91 ones).
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

devm_ioremap_resource does checks on the resource. No need to
duplicate this in the driver.
Signed-off-by: NBelén Sarabia <belensarabia@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

POWERHOLD signal has higher priority  over the DEV_ON bit.
So power off will not happen if the POWERHOLD is held high.
Hence reset the MUX to GPIO_7 mode to release the POWERHOLD
and the DEV_ON bit to take effect to power off the PMIC.

PMIC Power off happens in dire situations like thermal shutdown
so irrespective of the POWERHOLD setting go ahead and turn off
the powerhold.  Currently poweroff is broken on boards that have
powerhold enabled. This fixes poweroff on those boards.
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The tc6393xb mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: NJulia Cartwright <julia@ni.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The t7l66xb mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: NJulia Cartwright <julia@ni.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The asic3 mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: NJulia Cartwright <julia@ni.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

For better understanding of relationship between headers and modules
rename:
	intel_bxtwc.h -> intel_soc_pmic_bxtwc.h

While here, remove file name from the file itself.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

There is no need to include intel_soc_pmic.h into header which doesn't
require it.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>