- 06 9月, 2005 1 次提交
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由 David Gibson 提交于
Currently, we set the class bit in kernel SLB entries, and clear it on user SLB entries. On POWER5, ERAT entries created in real mode have the class bit clear. So to avoid flushing kernel ERAT entries on each context switch, this patch inverts our usage of the class bit, setting it on user SLB entries and clearing it on kernel SLB entries. Booted on POWER5 and G5. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 03 6月, 2005 1 次提交
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由 Anton Blanchard 提交于
The iseries has a bar graph on the front panel that shows how busy it is. The operating system sets and clears a bit in the CTRL register to control it. Instead of going to the complexity of using a thread info bit, just set and clear it in the idle loop. Also create two helper functions, ppc64_runlatch_on and ppc64_runlatch_off. Finally don't use the short form of the SPR defines. Signed-off-by: NAnton Blanchard <anton@samba.org> Acked-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 17 4月, 2005 1 次提交
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由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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