1. 12 2月, 2018 1 次提交
    • M
      mvpp2: fix multicast address filter · 7ac8ff95
      Mikulas Patocka 提交于
      IPv6 doesn't work on the MacchiatoBIN board. It is caused by broken
      multicast address filter in the mvpp2 driver.
      
      The driver loads doesn't load any multicast entries if "allmulti" is not
      set. This condition should be reversed.
      
      The condition !netdev_mc_empty(dev) is useless (because
      netdev_for_each_mc_addr is nop if the list is empty).
      
      This patch also fixes a possible overflow of the multicast list - if
      mvpp2_prs_mac_da_accept fails, we set the allmulti flag and retry.
      Signed-off-by: NMikulas Patocka <mpatocka@redhat.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7ac8ff95
  2. 22 1月, 2018 3 次提交
    • M
      net: mvpp2: enable ACPI support in the driver · a75edc7c
      Marcin Wojtas 提交于
      This patch introduces an alternative way of obtaining resources - via
      ACPI tables provided by firmware. Enabling coexistence with the DT
      support, in addition to the OF_*->device_*/fwnode_* API replacement,
      required following steps to be taken:
      
      * Add mvpp2_acpi_match table
      * Omit clock configuration and obtain tclk from the property - in ACPI
        world, the firmware is responsible for clock maintenance.
      * Disable comphy and syscon handling as they are not available for ACPI.
      * Modify way of obtaining interrupts - use newly introduced
        fwnode_irq_get() routine
      * Until proper MDIO bus and PHY handling with ACPI is established in the
        kernel, use only link interrupts feature in the driver. For the RGMII
        port it results in depending on GMAC settings done during firmware
        stage.
      * When booting with ACPI MVPP2_QDIST_MULTI_MODE is picked by
        default, as there is no need to keep any kind of the backward
        compatibility.
      
      Moreover, a memory region used by mvmdio driver is usually placed in
      the middle of the address space of the PP2 network controller.
      The MDIO base address is obtained without requesting memory region
      (by devm_ioremap() call) in mvmdio.c, later overlapping resources are
      requested by the network driver, which is responsible for avoiding
      a concurrent access.
      
      In case the MDIO memory region is declared in the ACPI, it can
      already appear as 'in-use' in the OS. Because it is overlapped by second
      region of the network controller, make sure it is released, before
      requesting it again. The care is taken by mvpp2 driver to avoid
      concurrent access to this memory region.
      Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a75edc7c
    • M
      net: mvpp2: use device_*/fwnode_* APIs instead of of_* · 24812221
      Marcin Wojtas 提交于
      OF functions can be used only for the driver using DT.
      As a preparation for introducing ACPI support in mvpp2
      driver, use struct fwnode_handle in order to obtain
      properties from the hardware description.
      
      This patch replaces of_* function with device_*/fwnode_*
      where possible in the mvpp2.
      Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      24812221
    • M
      net: mvpp2: simplify maintaining enabled ports' list · bf147153
      Marcin Wojtas 提交于
      'port_count' field of the mvpp2 structure holds an overall amount
      of available ports, based on DT nodes status. In order to be prepared
      to support other HW description, obtain the value by incrementing it
      upon each successful port initialization. This allowed for simplifying
      port indexing in the controller's private array, whose size is now not
      dynamically allocated, but fixed to MVPP2_MAX_PORTS.
      
      This patch simplifies creating and filling list of enabled ports and
      is a part of the preparation for adding ACPI support in the mvpp2 driver.
      Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bf147153
  3. 14 12月, 2017 5 次提交
  4. 09 12月, 2017 1 次提交
  5. 30 11月, 2017 1 次提交
  6. 28 11月, 2017 4 次提交
  7. 11 11月, 2017 1 次提交
  8. 08 11月, 2017 2 次提交
    • M
      net: mvpp2: add ethtool GOP statistics · 118d6298
      Miquel Raynal 提交于
      Add ethtool statistics support by reading the GOP statistics from the
      hardware counters. Also implement a workqueue to gather the statistics
      every second or some 32-bit counters could overflow.
      Suggested-by: NStefan Chulski <stefanc@marvell.com>
      Signed-off-by: NMiquel Raynal <miquel.raynal@free-electrons.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      118d6298
    • M
      net: mvpp2: Prevent userspace from changing TX affinities · 13c249a9
      Marc Zyngier 提交于
      The mvpp2 driver can't cope at all with the TX affinities being
      changed from userspace, and spit an endless stream of
      
      [   91.779920] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing
      [   91.779930] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing
      [   91.780402] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing
      [   91.780406] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing
      [   91.780415] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing
      [   91.780418] mvpp2 f4000000.ethernet eth2: wrong cpu on the end of Tx processing
      
      rendering the box completely useless (I've measured around 600k
      interrupts/s on a 8040 box) once irqbalance kicks in and start
      doing its job.
      
      Obviously, the driver was never designed with this in mind. So let's
      work around the problem by preventing userspace from interacting
      with these interrupts altogether.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      13c249a9
  9. 01 11月, 2017 6 次提交
  10. 26 10月, 2017 3 次提交
  11. 24 10月, 2017 3 次提交
  12. 02 10月, 2017 1 次提交
  13. 29 9月, 2017 3 次提交
  14. 20 9月, 2017 1 次提交
  15. 04 9月, 2017 3 次提交
  16. 02 9月, 2017 2 次提交