- 20 6月, 2012 11 次提交
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由 Kuninori Morimoto 提交于
In order to enable FSI-B selection from platform board, this patch adds its interface to GPIO framework. This patch is based on v1.0 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
r8a7740 FSI can select its parent clock, and its selection is dependent on platform board. In order to enable FSI parent selection from platform board, this patch adds its interface to clock framework. This patch is based on v1.0 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
It is required from sh_mobile_ceu_camera driver. This patch is based on v1.0 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
r8a7740 chip has lasting errata on MERAM buffer, and this patch adds its work-around on setup-r8a7740.c It solved CEU/VIO6C/2D-DMAC/VCP1/VPU5F/JPU/DISP memroy access error. But MERAM driver can't control this issue, since this work-around requires access to non-MERAM register address. So, This it will be called as board specific code at this point. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
In order to enable HDMI GPIO selection from platform board, this patch adds its interface to GPIO framework. This patch is based on v1.0 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
It is required from sh_mobile_hdmi driver. This patch is based on v1.0 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
It is required from sh_mobile_hdmi driver. This patch is based on v1.0 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Guennadi Liakhovetski 提交于
SDHI0 card-detect GPIO IRQ on mackarel currently works, because it is the default configuration of IRQ26. However, we should not rely on this and should configure the function explicitly. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Nobuhiro Iwamatsu 提交于
Build failed, when SMP is enabled and EMEV2 is not enabled. arch/arm/mach-shmobile/built-in.o: In function `shmobile_platform_cpu_kill': /home/iwamatsu/work/kernel/sh-2.6-devel/arch/arm/mach-shmobile/platsmp.c:62: undefined reference to `emev2_platform_cpu_kill' arch/arm/mach-shmobile/built-in.o: In function `shmobile_smp_get_core_count': /home/iwamatsu/work/kernel/sh-2.6-devel/arch/arm/mach-shmobile/platsmp.c:39: undefined reference to `emev2_get_core_count' arch/arm/mach-shmobile/built-in.o: In function `shmobile_smp_prepare_cpus': /home/iwamatsu/work/kernel/sh-2.6-devel/arch/arm/mach-shmobile/platsmp.c:53: undefined reference to `emev2_smp_prepare_cpus' arch/arm/mach-shmobile/built-in.o: In function `platform_secondary_init': /home/iwamatsu/work/kernel/sh-2.6-devel/arch/arm/mach-shmobile/platsmp.c:78: undefined reference to `emev2_secondary_init' arch/arm/mach-shmobile/built-in.o: In function `boot_secondary': /home/iwamatsu/work/kernel/sh-2.6-devel/arch/arm/mach-shmobile/platsmp.c:90: undefined reference to `emev2_boot_secondary This is the cause by when EMEV2 is disabled, that the check by OF of EMEV2 is performed in platsmp.c. This patch revise what the function about EMEV2 may not be used in this file, when EMEV2 is not enabled. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Acked-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
chclr_write() will use (chan_reg + chclr_offset). In sh7372 case, DMA1CHCLR is started from 0xfe008220, and chan_reg is started from 0xfe008020 (= sh7372_dmae0_resources). Thus, chclr_offset should be (0x220 - 0x20) instead of 0x220. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
681e1b3e (ARM: mach-shmobile: sh73a0 DMA Engine support for SY-DMAC) adds SY-DMAC, but it is 218, not 318 This patch is based on v2.0 manual Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 25 5月, 2012 1 次提交
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由 Magnus Damm 提交于
The STI hardware is based on a single 48-bit 32kHz counter that together with two individual compare registers can generate interrupts. There are no timer operating modes selectable which means that the timer can not clear on match. This driver is providing clocksource support for the 48-bit counter. Clockevents are also supported using the same timer in oneshot mode. Signed-off-by: NMagnus Damm <damm@opensource.se> Cc: horms@verge.net.au Cc: arnd@arndb.de Cc: johnstul@us.ibm.com Cc: rjw@sisk.pl Cc: lethal@linux-sh.org Cc: gregkh@linuxfoundation.org Cc: olof@lixom.net Link: http://lkml.kernel.org/r/20120525070344.23443.69756.sendpatchset@w520Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 18 5月, 2012 7 次提交
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由 Magnus Damm 提交于
Use DT_MACHINE_START() on the emev2 based KZM9D board. Also include a tiny DTS file to describe the board and update the Kconfig dependencies to select CONFIG_USE_OF. Update the SMP glue code to use OF for matching. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
This is EMEV2 DT support V3. The support is limited to whatever devices that are complied in the kernel. At this point we have UARTs handled by "em-uart" and a timer handled by "em-sti". Clocks and SMP are not supported. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
Tie in the on-board Ethernet controller on KZM9D and make use of the GPIO controller for external IRQ pin support. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
Tie in the Emma Mobile GPIO driver "em-gio" to support the GPIOs on Emma Mobile EV2. A static IRQ range is used to allow boards to hook up their platform devices to the GPIOs. DT support is still on the TODO for the GPIO driver, so only platform device support is included here. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
This is V3 of Emma Mobile EV2 SMP support. At this point only the most basic form of SMP operation is supported. TWD and CPU Hotplug support is excluded. Tied to both the Emma Mobile EV2 and the KZM9D board due to the need to switch on board in platsmp.c and the newly introduced need for static mappings. The static mappings are needed to allow hardware acces early during boot when SMP is initialized. This early requirement forces us to also map in the SMU registers. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
V3 of basic KZM9D board support. At this point a quite thin layer that makes use of the Emma Mobile EV2 SoC code. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
This is V3 of the Emma Mobile EV2 SoC support. Included here is support for serial and timer devices which is just about enough to boot a kernel. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 17 5月, 2012 2 次提交
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由 Kuninori Morimoto 提交于
Current IRQ16-IRQ31 irq number are located around 800 from 1ee8299a (ARM: mach-shmobile: Use 0x3400 as INTCS vector offset) But, the PINT0/1 IRQ number are also located around 800 from 0df1a838 (ARM: mach-shmobile: sh73a0 PINT IRQ base fix) This patch relocates PINT0/1 IRQ number to around 700 where is not used, and adds current IRQ location table in comment area. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Arnd Bergmann 提交于
I got build errors with the new version now because machine_is_kzm9g is no longer defined: arch/arm/mach-shmobile/platsmp.c: In function 'shmobile_smp_get_core_count': arch/arm/mach-shmobile/platsmp.c:29:2: error: implicit declaration of function 'of_machine_is_compatible' Replace the missing function with a call to of_machine_is_compatible. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: N"Rafael J. Wysocki" <rjw@sisk.pl> Acked-by: NMagnus Damm <magnus.damm@gmail.com>
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- 15 5月, 2012 2 次提交
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由 Magnus Damm 提交于
Use DT_MACHINE_START() on the r8a7740 based armadillo 800 eva board. Also include a tiny DTS file to describe the board and update the Kconfig dependencies to select CONFIG_USE_OF. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Magnus Damm 提交于
Use DT_MACHINE_START() on the sh73a0 based KZM9G board. Also include a tiny DTS file to describe the board and update the Kconfig dependencies to select CONFIG_USE_OF. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 13 5月, 2012 17 次提交
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由 Kuninori Morimoto 提交于
Update the KZM9G defconfig and the code in platsmp.c to support SMP on the sh73a0 based KZM9G board. Also fix up the earlyprintk setting that was previously incorrect. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
This patch adds extra GPIO via PCF8757 chip, and use it as gpio-key. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
The correct screen direction of KZM9G board needs PORT226/SC settings. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
GPIO_NR is added in order to clarify end of GPIO array. We can add extra GPIO from it. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
MSEL2CR MSEL18 should be 1 if I2C-3 Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
AS3711 chip initalization is required for enabling LCDC backlight, but there is no driver for this chip. So, this patch sends its settings when boot. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
This patch uses r8a66597_hcd driver, since renesas_usbhs driver doesn't support external R8A66597 chip. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
This adds very basic KZM-A9-GT board (SH73a0) support Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
armadillo800eva board is using sh-eth, but clock-r8a7740 didn't care it. This clock was enabled by boot-loader. This patch fix it up. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
The default 2MB size of DMA coherent memory isn't enough for allocate frame buffer memory. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
We can switch CON8/CON14 by SW1.5 SDHI1 is CON8 (SW1.5 = ON) Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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由 Kuninori Morimoto 提交于
On armadillo800eva board, CD (= Card Detect) pin is not connected to SDHI0_CD. Then, we can use IRQ31 as card detect irq, but it needs chattering removal operation. We should use IRQ card detect in the future, but this patch use polling mode at this point. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NSimon Horman <horms@verge.net.au> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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