- 15 10月, 2009 7 次提交
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由 Paul Walmsley 提交于
clock24xx.c is missing a omap2_init_clk_clkdm() in its omap2_clk_init() function. Among other bad effects, this causes the OMAP hwmod layer to oops on boot. Thanks to Carlos Aguiar <carlos.aguiar@indt.org.br> and Stefano Panella <Stefano.Panella@csr.com> for reporting this bug. Thanks to Tony Lindgren <tony@atomide.com> for N800 booting advice. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Carlos Aguiar <carlos.aguiar@indt.org.br> Cc: Stefano Panella <Stefano.Panella@csr.com> Cc: Tony Lindgren <tony@atomide.com>
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由 Kalle Jokiniemi 提交于
There is a possible race condition in clockdomain code handling hw supported idle transitions. When multiple autodeps dependencies are being added or removed, a transition of still remaining dependent powerdomain can result in false readings of the state counter. This is especially fatal for off mode state counter, as it could result in a driver not noticing a context loss. Fixed by disabling hw supported state transitions when autodeps are being changed. Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jarkko Nikula 提交于
This small typo written by author causes that McBSP receiver is disabled on OMAP2430 and OMAP3430 even if only transmitter is stopped. This was noted with ALSA SoC where simultaneous recording halted if playback was stopped first. Signed-off-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Teerth Reddy 提交于
This patch initializes the correct SDRC settings required for DVFS on Zoom2. Signed-off-by: NTeerth Reddy <teerth@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Aaro Koskinen 提交于
The I2C-1 bus frequency on RX-51 should be 2.2 MHz. The speed is limited by TWL5030/GAIA; a higher speed could lead to errors on the interface. The maximum speed depends on the system clock for GAIA: 2.2 MHz (if 19.2 MHz), 2.4 MHz (26 MHz) or 2.9 MHz (38.4 MHz). Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Anuj Aggarwal 提交于
Argument tparams was not being used to program global register GCR.HI_THREAD_RESERVED. This patch fixes the same. Signed-off-by: NAnuj Aggarwal <anuj.aggarwal@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sanjeev Premi 提交于
The symbol CONFIG_ISP1301_OMAP was defined twice in the defconfig. This was causing the warning: arch/arm/configs/omap3_beagle_defconfig:972:warning: override: reassigning to symbol ISP1301_OMAP Signed-off-by: NSanjeev Premi <premi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 10月, 2009 1 次提交
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由 Nitin Gupta 提交于
On ARM, update_mmu_cache() does dcache flush for a page only if it has a kernel mapping (page_mapping(page) != NULL). The correct behavior would be to force the flush based on dcache_dirty bit only. One of the cases where present logic would be a problem is when a RAM based block device[1] is used as a swap disk. In this case, we would have in-memory data corruption as shown in steps below: do_swap_page() { - Allocate a new page (if not already in swap cache) - Issue read from swap disk - Block driver issues flush_dcache_page() - flush_dcache_page() simply sets PG_dcache_dirty bit and does not actually issue a flush since this page has no user space mapping yet. - Now, if swap disk is almost full, this newly read page is removed from swap cache and corrsponding swap slot is freed. - Map this page anonymously in user space. - update_mmu_cache() - Since this page does not have kernel mapping (its not in page/swap cache and is mapped anonymously), it does not issue dcache flush even if dcache_dirty bit is set by flush_dcache_page() above. <user now gets stale data since dcache was never flushed> } Same problem exists on mips too. [1] example: - brd (RAM based block device) - ramzswap (RAM based compressed swap device) Signed-off-by: NNitin Gupta <ngupta@vflare.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 10月, 2009 3 次提交
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由 Dennis O'Brien 提交于
PXA27x Errata #37 implies system will hang when switching into or out of half turbo (HT bit in CLKCFG) mode, workaround this by not using it. Signed-off-by: NDennis O'Brien <dennis.obrien@eqware.net> Cc: stable-2.6.31 <stable@kernel.org> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Julia Lawall 提交于
Currently the irq_type field of the csb726_lan_config structure is initialized twice. The value in the first case, SMSC911X_IRQ_POLARITY_ACTIVE_LOW, is normally stored in the irq_polarity field, so I have renamed the field in the first initialization to that. Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Alexey Dobriyan 提交于
After m68k's task_thread_info() doesn't refer to current, it's possible to remove sched.h from interrupt.h and not break m68k! Many thanks to Heiko Carstens for allowing this. Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
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- 11 10月, 2009 5 次提交
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由 Russell King 提交于
Seemingly this support was missed when highmem was added, so DEBUG_HIGHMEM wouldn't have checked the kmap_atomic type. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Johannes Weiner 提交于
Bit testing (test, testset, testclear, testchange) for bit numbers known at compile time returns a word with the tested-for bit set. Change it to return a true boolean value so to make it consistent with the out-of-line path and all the other bitops implementations. Signed-off-by: NJohannes Weiner <hannes@cmpxchg.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Make die() better match x86: - add printing of the last accessed sysfs file - ensure console_verbose() is called under the lock - ensure we panic outside of oops_exit() Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
dump_mem and dump_backtrace were both using multiple printk statements to print each line. With DEBUG_LL enabled, this causes OOPS to become very difficult to read. Solve this by only using one printk per line. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 10 10月, 2009 3 次提交
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由 Hartley Sweeten 提交于
The clock generation system in the ep93xx uses two external oscillator's and two internal PLLs to derive all the internal clocks. Many of these internal clocks can be stopped to save power. This introduces a "parent" hierarchy for the clocks so that the users count can be correctly tracked for power management. The "parent" for the video clock can either be one of the PLL outputs or the external oscillator. In order to correctly track the "parent" for the video clock calc_clk_div() needed to be modified. It now returns an error code if the desired rate cannot be generated. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NRyan Mallon <ryan@bluewatersys.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hartley Sweeten 提交于
Update the ep93xx i2c support: 1) The platform init code passes the configuration data for the i2c-gpio driver. This allows any gpio pin do be used for the sda and scl pins. It also allows the platform to specify the udelay and timeout. 2) Program the gpio configuration register to enable/disable the open drain drivers. Note that this really only works if the sda and scl pins are set to EP93XX_GPIO_LINE_EEDAT and EP93XX_GPIO_LINE_EECLK. 3) Update the edb93xx.c platform init to use the new support. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NRyan Mallon <ryan@bluewatersys.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hartley Sweeten 提交于
Most of the EP93XX_GPIO_*_INT_* register defines in ep93xx-regs.h not required due to how the ep93xx core and gpiolib support handle gpio interrupts. Remove the defines to prevent future confusion. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NRyan Mallon <ryan@bluewatersys.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 10月, 2009 10 次提交
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由 Hartley Sweeten 提交于
Change the #define's for the EP93XX_*_PHYS_BASE addresses to use macros for easier readability. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NRyan Mallon <ryan@bluewatersys.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hubert Feurstein 提交于
Add Contec Micro9-Slim support Cc: Ryan Mallon <ryan@bluewatersys.com> Requires: 5750/1 Signed-off-by: NHubert Feurstein <hubert.feurstein@contec.at> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hubert Feurstein 提交于
Update Contec Micro9 platform code Cc: Ryan Mallon <ryan@bluewatersys.com> Requires: 5749/1 Signed-off-by: NHubert Feurstein <hubert.feurstein@contec.at> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hubert Feurstein 提交于
Update Contec Micro9 maintainer and add entry in MAINTAINERS Cc: Ryan Mallon <ryan@bluewatersys.com> Requires: 5744/1 Signed-off-by: NHubert Feurstein <hubert.feurstein@contec.at> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NManfred Gruber <m.gruber@tirol.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Dmitry Artamonow 提交于
Both iPaqs h3100 and h3600 currently share the same source file - h3600.c But Makefile builds it only if CONFIG_SA1100_H3600 selected, so selecting just CONFIG_SA1100_H3100 results in "no machine record defined" message and aborted compilation. Fix it. Signed-off-by: NDmitry Artamonow <mad_soft@inbox.ru> Acked-by: NKristoffer Ericson <kristoffer.ericson@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Leo Chen 提交于
Fix the warning messages during kernel build for bcmring. Signed-off-by: NLeo Hao Chen <leochen@broadcom.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
If sparsemem is enabled, the start_pfn passed to the free_memmap() function corresponds to an area of memory not known to the kernel and pfn_to_page returns a wrong value. The (start_pfn - 1), however, is known to the kernel. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
This is needed because applications using the sys_cacheflush system call can pass a memory range which isn't mapped yet even though the corresponding vma is valid. The patch also adds unwinding annotations for correct backtraces from the coherent_user_range() functions. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hartley Sweeten 提交于
From: Ryan Mallon <ryan@bluewatersys.com> Change the gpio_to_irq and irq_to_gpio static inline functions to macros so that they can be used in variable initialisers. Signed-off-by: NRyan Mallon <ryan@bluewatersys.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hartley Sweeten 提交于
This adds the missing Kconfig options for the first SDRAM bank address on ep93xx boards. Cc: Hubert Feurstein <(address hidden)> Signed-off-by: H Hartley Sweeten <(address hidden)> Acked-by: Ryan Mallon <(address hidden)> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 10月, 2009 11 次提交
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由 Daniel Walker 提交于
I was using Coccinelle with the mutex_unlock semantic patch, and it unconvered this problem. It appears to be a valid missing unlock issue. This change should correct it by moving the unlock below the label. This patch is against the mainline kernel. Cc: Julia Lawall <julia@diku.dk> Cc: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: NDaniel Walker <dwalker@fifo99.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Hiroshi DOYU 提交于
Fix incorrect spelling Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 ye janboe 提交于
the original flush operation is to flush the function address which is copied from. But we do not change the function code and it is not necessary to flush it. Signed-off-by: Njanboe <janboe.ye@gmail.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Amit Kucheria 提交于
The original driver was written with the KEY() macro defined as (col, row) instead of (row, col) as defined by the matrix keypad infrastructure. So the keymap was defined accordingly. Since the driver that was merged upstream uses the matrix keypad infrastructure, modify the keymap accordingly. While we are at it, fix the comments in twl4030.h and define PERSISTENT_KEY as (r,c) instead of (c, r) Tested on a RX51 (N900) device. Signed-off-by: NAmit Kucheria <amit.kucheria@verdurent.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDmitry Torokhov <dtor@mail.ru>
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由 Rajendra Nayak 提交于
Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and USBTLL f-clock are the only users of this DPLL, and 120MHz is is the only recommended rate for these clocks. With this patch, the 60 MHz ULPI clock is generated correctly. Tested on an OMAP3430 SDP. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NAnand Gadiyar <gadiyar@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Commit cd922049 added support for omap850. However, the patch accidentally removed the wrong ifdef: # define cpu_is_omap730() 1 # endif #endif +#else +# if defined(CONFIG_ARCH_OMAP850) +# undef cpu_is_omap850 +# define cpu_is_omap850() 1 +# endif +#endif ... void omap2_check_revision(void); #endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */ - -#endif Instead of removing removing the #endif at the end of the file, the #endif before #else should have been removed. But we cannot have multiple #else statements as pointed out by Alistair Buxton <a.j.buxton@gmail.com>. So the fix is to: - remove the non-multi-omap special handling, as we need to detect between omap730 and omap850 anyways. - add the missing #endif back to the end of the file Reported-by: NSanjeev Premi <premi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Artem Bityutskiy 提交于
The 'pwrdm_for_each()' function walks powerdomains with a spinlock locked, so the the callbacks cannot do anything which may sleep. This patch introduces a 'pwrdm_for_each_nolock()' helper which does the same, but without the spinlock locked. This fixes the following lockdep warning: [ 0.000000] WARNING: at kernel/lockdep.c:2460 lockdep_trace_alloc+0xac/0xec() [ 0.000000] Modules linked in: (unwind_backtrace+0x0/0xdc) from [<c0045464>] (warn_slowpath_common+0x48/0x60) (warn_slowpath_common+0x48/0x60) from [<c0067dd4>] (lockdep_trace_alloc+0xac/0xec) (lockdep_trace_alloc+0xac/0xec) from [<c009da14>] (kmem_cache_alloc+0x1c/0xd0) (kmem_cache_alloc+0x1c/0xd0) from [<c00b21d8>] (d_alloc+0x1c/0x1a4) (d_alloc+0x1c/0x1a4) from [<c00a887c>] (__lookup_hash+0xd8/0x118) (__lookup_hash+0xd8/0x118) from [<c00a9f20>] (lookup_one_len+0x84/0x94) (lookup_one_len+0x84/0x94) from [<c010d12c>] (debugfs_create_file+0x8c/0x20c) (debugfs_create_file+0x8c/0x20c) from [<c010d320>] (debugfs_create_dir+0x1c/0x20) (debugfs_create_dir+0x1c/0x20) from [<c000e8cc>] (pwrdms_setup+0x60/0x90) (pwrdms_setup+0x60/0x90) from [<c002e010>] (pwrdm_for_each+0x30/0x80) (pwrdm_for_each+0x30/0x80) from [<c000e79c>] (pm_dbg_init+0x7c/0x14c) (pm_dbg_init+0x7c/0x14c) from [<c00232b4>] (do_one_initcall+0x5c/0x1b8) (do_one_initcall+0x5c/0x1b8) from [<c00083f8>] (kernel_init+0x90/0x10c) (kernel_init+0x90/0x10c) from [<c00242c4>] (kernel_thread_exit+0x0/0x8) Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kevin Hilman 提交于
Currently, only GPIOs in the wakeup domain (GPIOs in bank 0) are enabled as wakups. This patch also enables GPIOs in the PER powerdomain (banks 2-6) to be used as possible wakeup sources. In addition, this patch ensures that all GPIO wakeups can wakeup the MPU using the PM_MPUGRPSEL_<pwrdm> registers. NOTE: this doesn't enable the individual GPIOs as wakeups, this simply enables the per-bank wakeups at the powerdomain level. This problem was discovered by Mike Chan when preventing the CORE powerdomain from going into retention/off. When CORE was allowed to hit retention, GPIO wakeups via IO pad were working fine, but when CORE remained on, GPIO module-level wakeups were not working properly. To test, prevent CORE from going inactive/retention/off, thus preventing the IO chain from being armed: # echo 3 > /debug/pm_debug/core_pwrdm/suspend This ensures that GPIO wakeups happen via module-level wakeups and not via IO pad. Tested on 3430SDP using the touchscreen GPIO (gpio 2, in WKUP) Tested on Zoom2 using the QUART interrup GPIO (gpio 102, in PER) Also, c.f. OMAP PM wiki for troubleshooting GPIO wakeup issues: http://elinux.org/OMAP_Power_ManagementReported-by: NMike Chan <mikechan@google.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Vikram Pandita 提交于
USBHOST module has 2 fclocks (for HOST1 and HOST2), only one iclock and only a single bit in the WKST register to indicate a wakeup event. Because of the single WKST bit, we cannot know whether a wakeup event was on HOST1 or HOST2, so enable both fclocks before clearing the wakeup event to ensure both hosts can properly clear the event. Signed-off-by: NVikram Pandita <vikram.pandita@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Paul Walmsley 提交于
Clearing wakeup sources is now only done when the PRM indicates a wakeup source interrupt. Since we don't handle any other types of PRCM interrupts right now, warn if we get any other type of PRCM interrupt. Either code needs to be added to the PRCM interrupt handler to react to these, or these other interrupts should be masked off at init. Updated after Jon Hunter's PRCM IRQ rework by Kevin Hilman. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Paul Walmsley 提交于
PM_WKST register contents should be ANDed with the contents of the MPUGRPSEL registers. Otherwise the MPU PRCM interrupt handler could wind up clearing wakeup events meant for the IVA PRCM interrupt handler. A future revision to this code should be to read a cached version of MPUGRPSEL from the powerdomain code, since PRM reads are relatively slow. Updated after Jon Hunter's PRCM IRQ change by Kevin Hilman Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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