1. 29 2月, 2012 1 次提交
  2. 02 2月, 2012 2 次提交
  3. 31 1月, 2012 1 次提交
  4. 24 1月, 2012 1 次提交
  5. 06 1月, 2012 2 次提交
  6. 02 1月, 2012 2 次提交
  7. 28 12月, 2011 1 次提交
  8. 24 12月, 2011 3 次提交
  9. 23 12月, 2011 7 次提交
  10. 19 12月, 2011 1 次提交
  11. 14 12月, 2011 1 次提交
  12. 08 12月, 2011 2 次提交
  13. 05 12月, 2011 6 次提交
    • N
      dmaengine/ste_dma40: allow fixed physical channel · 5cd326fd
      Narayanan G 提交于
      Allow logical channels to specify the physical channel they want to use.
      This is needed to avoid two peripherals operating on the same physical
      channel during some special use-cases. (like mmc and usb during a
      usb mass storage case).
      Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
      Signed-off-by: NNarayanan G <narayanan.gopalakrishnan@stericsson.com>
      Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      5cd326fd
    • V
      dmaengine/amba-pl08x: Config ccfg and increment phychan_hold if phychan is true · 8f0d30f9
      Viresh Kumar 提交于
      Currently, if plchan->phychan is true, we return immediately from
      prep_phy_chan(). We must configure txd->ccfg and increment phychan_hold before
      returning. Otherwise, request line number wouldn't be configured in this txd.
      Reported-by: NRajeev Kumar <rajeev-dlh.kumar@st.com>
      Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      8f0d30f9
    • A
      dmaengine: convert drivers/dma/* to use module_platform_driver() · c94e9105
      Axel Lin 提交于
      This patch converts the drivers in drivers/dma/* to use the
      module_platform_driver() macro which makes the code smaller and a bit
      simpler.
      
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Piotr Ziecik <kosmo@semihalf.com>
      Cc: Rongjun Ying <rongjun.ying@csr.com>
      Cc: Barry Song <21cnbao@gmail.com>
      Cc: Pelagicore AB <info@pelagicore.com>
      Signed-off-by: NAxel Lin <axel.lin@gmail.com>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      c94e9105
    • H
      IMX/SDMA : save the real count for one DMA transaction. · ab59a510
      Huang Shijie 提交于
      When we use the SDMA in the UART driver(such as imx6q), we will
      meet one situation:
        Assume we set 64 bytes for the RX DMA buffer.
        The RX DMA buffer has received some data, but not full.
        An Aging DMA request will be received by the SDMA controller if we enable the
        IDDMAEN(UCR4[6]) in this case.
      
      So the UART driver needs to know the count of the real received bytes,
      and push them to upper layer.
      
      Add two new fields to sdmac, and update the `residue` in sdma_tx_status().
      Signed-off-by: NHuang Shijie <b32955@freescale.com>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      ab59a510
    • M
      dma/ep93xx_dma: prevent ep93xx_dma_tasklet() to reference an empty list · 6d0709d2
      Mika Westerberg 提交于
      If dma_terminate_all() is called before the ep93xx_dma_tasklet() gets to run,
      it tries to access an empty ->active list which results following OOPS:
      
        Internal error: Oops - undefined instruction: 0 [#1]
        CPU: 0    Not tainted  (3.2.0-rc1EP-1+ #1008)
        PC is at 0xc184c868
        LR is at ep93xx_dma_tasklet+0xec/0x164
        pc : [<c184c868>]    lr : [<c012b528>]    psr: 00000013
        sp : c02b7e70  ip : ffffffff  fp : c02b7ea4
        r10: 00000100  r9 : 80000013  r8 : c02b7e50
        r7 : c02b7e70  r6 : c02b7ea4  r5 : 000000a4  r4 : c02b7e70
        r3 : c02b751d  r2 : 8ae34598  r1 : c184c6e0  r0 : c02b7ea4
        Flags: nzcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
        Control: c000717f  Table: c0004000  DAC: 00000017
        Process swapper (pid: 0, stack limit = 0xc02b6270)
        Stack: (0xc02b7e70 to 0xc02b8000)
        7e60:                                     c02b7ea4 c02b7e70 c0008b64 c02bd5c4
        7e80: c02d60e0 00000000 00000000 c02bd44c c02d60e0 00000100 c02b7ec4 c02b7ea8
        7ea0: c001c49c c012b44c 00000018 00000001 c02d60e0 c02b6000 c02b7f04 c02b7ec8
        7ec0: c001cbc0 c001c3e4 c02b7eec c02b7ed8 00000006 0000000a c02bf674 c02c458c
        7ee0: 00000011 00000000 c02b7f7c c0004000 41129200 c02b0c80 c02b7f14 c02b7f08
        7f00: c001cdd0 c001cb38 c02b7f34 c02b7f18 c000983c c001cd98 c0009a60 60000013
        7f20: fefb0001 c02b7f7c c02b7f44 c02b7f38 c0008190 c0009810 c02b7f9c c02b7f48
        7f40: c0008b64 c0008190 c02c2bf8 00000002 c02b7f90 60000013 c02b6000 c02d1504
        7f60: c02baa88 c02baa80 c0004000 41129200 c02b0c80 c02b7f9c c02b7fa0 c02b7f90
        7f80: c0009a54 c0009a60 60000013 ffffffff c02b7fbc c02b7fa0 c000a03c c0009a40
        7fa0: c02b80b0 c02b19dc c02b19d8 c02baa80 c02b7fcc c02b7fc0 c02384e4 c0009fd4
        7fc0: c02b7ff4 c02b7fd0 c029d924 c0238494 c029d49c 00000000 00000000 c02b19dc
        7fe0: c0007175 c02b803c 00000000 c02b7ff8 c000803c c029d700 00000000 00000000
        Backtrace:
        [<c012b43c>] (ep93xx_dma_tasklet+0x0/0x164) from [<c001c49c>] (tasklet_action+0xc8/0xdc)
        [<c001c3d4>] (tasklet_action+0x0/0xdc) from [<c001cbc0>] (__do_softirq+0x98/0x154)
         r7:c02b6000 r6:c02d60e0 r5:00000001 r4:00000018
        [<c001cb28>] (__do_softirq+0x0/0x154) from [<c001cdd0>] (irq_exit+0x48/0x50)
        [<c001cd88>] (irq_exit+0x0/0x50) from [<c000983c>] (handle_IRQ+0x3c/0x8c)
        [<c0009800>] (handle_IRQ+0x0/0x8c) from [<c0008190>] (asm_do_IRQ+0x10/0x14)
         r7:c02b7f7c r6:fefb0001 r5:60000013 r4:c0009a60
        [<c0008180>] (asm_do_IRQ+0x0/0x14) from [<c0008b64>] (__irq_svc+0x24/0xc0)
        Exception stack(0xc02b7f48 to 0xc02b7f90)
        7f40:                   c02c2bf8 00000002 c02b7f90 60000013 c02b6000 c02d1504
        7f60: c02baa88 c02baa80 c0004000 41129200 c02b0c80 c02b7f9c c02b7fa0 c02b7f90
        7f80: c0009a54 c0009a60 60000013 ffffffff
        [<c0009a30>] (default_idle+0x0/0x34) from [<c000a03c>] (cpu_idle+0x78/0xb0)
        [<c0009fc4>] (cpu_idle+0x0/0xb0) from [<c02384e4>] (rest_init+0x60/0x78)
         r7:c02baa80 r6:c02b19d8 r5:c02b19dc r4:c02b80b0
        [<c0238484>] (rest_init+0x0/0x78) from [<c029d924>] (start_kernel+0x234/0x278)
        [<c029d6f0>] (start_kernel+0x0/0x278) from [<c000803c>] (0xc000803c)
         r5:c02b803c r4:c0007175
        Code: 42555300 54535953 643d4d45 65766972 (53007372)
      
      To make the code a bit more robust against things like these, we modify
      ep93xx_dma_get_active() to return NULL in case of empty ->active list and make
      sure that callers handle this correctly.
      Reported-by: NRafal Prylowski <prylowski@metasoft.pl>
      Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi>
      Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      6d0709d2
    • R
      dma/ep93xx_dma: fix initialization of M2M control register · b62cfc5e
      Rafal Prylowski 提交于
      Setting the flags in case of IDE didn't have any effect since the control
      register is overwritten few lines below. So move these to be after the control
      register is initialized.
      Signed-off-by: NRafal Prylowski <prylowski@metasoft.pl>
      Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi>
      Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      b62cfc5e
  14. 28 11月, 2011 6 次提交
  15. 24 11月, 2011 1 次提交
    • T
      dmatest: don't use set_freezable_with_signal() · adfa543e
      Tejun Heo 提交于
      Commit 981ed70d (dmatest: make dmatest threads freezable) made
      dmatest kthread use set_freezable_with_signal(); however, the
      interface is scheduled to be removed in the next merge window.
      
      The problem is that unlike userland tasks there's no default place
      which handles signal pending state and it isn't clear who owns and/or
      is responsible for clearing TIF_SIGPENDING.  For example, in the
      current code, try_to_freeze() clears TIF_SIGPENDING but it isn't sure
      whether it actually owns the TIF_SIGPENDING nor is it race-free -
      ie. the task may continue to run with TIF_SIGPENDING set after the
      freezable section.
      
      Unfortunately, we don't have wait_for_completion_freezable_timeout().
      This patch open codes it and uses wait_event_freezable_timeout()
      instead and removes timeout reloading - wait_event_freezable_timeout()
      won't return across freezing events (currently racy but fix scheduled)
      and timer doesn't decrement while the task is in freezer.  Although
      this does lose timer-reset-over-freezing, given that timeout is
      supposed to be long enough and failure to finish inside is considered
      irrecoverable, I don't think this is worth the complexity.
      
      While at it, move completion to outer scope and explain that we're
      ignoring dangling pointer problem after timeout.  This should give
      slightly better chance at avoiding oops after timeout.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Acked-by: NDan Williams <dan.j.williams@intel.com>
      Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
      Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
      adfa543e
  16. 22 11月, 2011 3 次提交