Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

-ffunction-sections serves as a workaround for the problems caused by the
limited branch range in some inline assembler fragments for very large
compilation units.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

* Merge tx4927_pci.h into tx4927.h
* Kill (broken) external PCI clock frequency reporting
* Kill unnecessary wbflush()
* Kill unnecessary includes
* Kill debug garbages
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Declare pci_probe_only, etc. in asm-mips/pci.h file.  This will fix
some sparse warnings.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Create platform devices for audio and volume button driver.
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

SGI-IP28 is running in so called slow mode, when kernel is started
from the PROM. PROM calls must be done in slow mode otherwise the
PROM will issue an error. To get better memory performance we now
switch to normal mode, when the PROM is no longer needed.
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The following errors were caught by sparse:

>>>>>>>>>>>

arch/mips/mips-boards/generic/display.c:30:6: warning: symbol
'mips_display_message' was not declared. Should it be static?

arch/mips/mips-boards/generic/display.c:58:6: warning: symbol
'mips_scroll_message' was not declared. Should it be static?

>>>>>>>>>>>

This patch includes the asm/mips-boards/prom.h header file into
arch/mips/mips-boards/generic/display.c. This adds the needed
function declarations, and the errors are gone.

Compile-tested using defconfigs for Malta, Atlas and SEAD boards.
Runtime test was successfully performed by booting a Malta 4Kc
board up to the shell prompt.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The gcmp_probe() function is needlessly defined global, and
this patch makes it static.

Tested by booting a Malta 4Kc board up to the shell prompt.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Both the fill_ipi_map() routine and the gic_intr_map array defined
in arch/mips/mips-boards/malta/malta_int.c are not used outside of
the latter file. Thus, these objects can become static. Moreover,
these two objects are used by the MT code only, which is why this
patch adds the appropriate ifdef.

While at it, this patch removes an unnecessary preprocessing macro
in favor of the commonly used ARRAY_SIZE.

Successfully tested using a Qemu-emulated Malta board for both SMP
and UP kernels.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The following symbols

	hose_head
	hose_tail

are needlessly defined global in arch/mips/pci/pci.c, and
this patch makes them static.

The variable pci_isa_hose is not used, and is removed by
this patch.

Spotted by namespacecheck. Tested by booting a Malta 4Kc
board up to the shell prompt.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The pit_clockevent symbol is needlessly defined global. This patch makes
that variable static.

Spotted by sparse. Compile-tested using Malta defconfig.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Both onboard controller of the O2 support FAST-20 transfer speeds,
but the bit, which signals that to the aic driver, isn't set. Instead
of adding detection code to the scsi driver, we just fake the missing
bit in the PCI config space of the scsi chips.
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Never terribly functional or popular, plagued by hard to fix bugs the time
to say goodbye has more than arrived.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The following routines

allocate_irqno()
free_irqno()

seem not to be used outside of the core kernel code, hence
exporting these functions is pointless. This patch removes
the export.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The following routines

uasm_rel_highest()
uasm_rel_higher()

are needlessly defined global. This patch makes them static.

Compile-tested using a customized config for the Malta board. Booting
the same board up to the shell prompt was also successful with this
patch applied.

Spotted by sparse.
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch fixes the following sparse warning:

<<<<<<<<

arch/mips/kernel/early_printk.c:35:13: warning: symbol 'setup_early_printk'
was not declared. Should it be static?

<<<<<<<<

The fix is to define a prototype of the setup_early_printk() function and
to include the appropriate header into arch/mips/kernel/early_printk.c.

[Ralf: Sorted includes again]
Signed-off-by: NDmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 The isa_slot_offset variable and its __ISA_IO_base macro is not used
anywhere anymore.  It does not look like a decent interface per today's
standards either.  Remove both including all places of initialization.
Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It is not used anywhere in tree.
Signed-off-by: NDavid Daney <ddaney@avtrex.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The generated copy_page for R4k CPU with a 128 byte cache line size used
Create Dirty Exclusive cache line operations even if only part of the
cache line was filled.  This change avoids generating cache operations,
if only part of the cache line size is copied in one loop. It also
increases the maxmimum loop size, because the generated code even fits
into the available space for r4k CPUs with 128 byte cache line size.
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Resolve these mismatches by defining affected functions with the __cpuinit
attribute, rather than __init.
Signed-off-by: NShane McDonald <mcdonald.shane@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The txx9_tmr_init() will not clear a timer counter register in a certain
case.  The counter register is cleared on 1->0 transition of TCE bit if
CRE=1.  So just clearing the TCE bit is not enough.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The introduction of a real dma cache invalidate makes it important
to have a correct cache line size, otherwise the kernel will gives
out two memory segment, which might share one cache line. The R4400
Indy/Indigo2 CPU modules are using a second level cache line size
of 128 bytes, so MIPS_L1_CACHE_SHIFT needs to be bumped up to 7 for
IP22.
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It's possible that the crime interrupt handler is called without
pending interrupts (probably a hardware issue). To avoid irritating
"unexpected irq 71" messages, we now just ignore the spurious crime
interrupts.
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Au12x0 MMC platform device strangely claims 0x41 bytes for its
memory-mapped registers.  Make it claim the whole 0x80000 instead according
to the memory map given in the datasheets.
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

These boards need cca setup on CMDLINE.
Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Fix 64-bit Malta by using CKSEG0ADDR and correct casts.
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

LASAT's sysctl interface was broken, it failed a check during boot because
a single entry had a sysctl number and the rest were unnumbered. When I
fixed it I noticed that the whole sysctl file needed a spring clean, it was
using mutexes where it wasn't needed (it's only needed to protect during
writes to the EEPROM), so I moved that stuff out and generally cleaned the
whole thing up.

So now, LASAT's sysctl/proc interface is working again.
Signed-off-by: NThomas Horsten <thomas@horsten.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Assuming the call of kmap_coherent in local_r4k_flush_cache_page doesn't
need fixing this was skipped in fcae549295bcae801ac48fc1c2030ab8cc487020.
Turns out it needed the same change after all.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

After the common MIPS CPU interrupt controller (for irq0-7) was introduced
the Lasat boards didn't get their interrupts right, so nothing worked. The
old routines need to be offset by the new 8 hardware interrupts common to
all MIPS CPU's.
Signed-off-by: NThomas Horsten <thomas@horsten.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NChris Dearman <chris@mips.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

 The SWARM defconfig file has not been regenerated for over a year now.
Here is a patch to bring the file up to date.  Additionally some important
and sometimes confusing changes happened meanwhile.  Here is the list of
notable corresponding updates to the configuration:

1. CPU_SB1_PASS_2_2 is now selected rather than CPU_SB1_PASS_1.  The
   latter requires a non-standard -msb1-pass1-workarounds option to be
   supported by GCC and I am told is quite rare anyway.

   [Ralf: Afaik -msb1-pass1-workarounds is available only in Monta Vista's
   special Sibyte gcc 3.0 variant and gcc 3.0 is too old to build a modern
   kernel anyway.]

2. PHYLIB and BROADCOM_PHY are both built in and NETDEV_1000 enabled as
   required by SB1250_MAC.

3. USB and USB_OHCI_HCD are enabled as there is an OHCI chip onboard.

4. TMPFS is enabled, because I use it. ;-)
Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>