1. 29 8月, 2012 5 次提交
    • D
      ALSA: emu8000: fix emu8000 DRAM sized 512 KiB too small · 1338fc97
      David Flater 提交于
      v2:  Fixed result still wrong in the case of 512 KiB DRAM.  Oops.
      
      Applicable to 3.5.3 mainline.
      
      In emu8000.c, size_dram determines the amount of memory on the sound card by
      doing write/readback tests starting at 512 KiB and incrementing by 512 KiB.
      On success, detected_size is updated to the successful address and testing
      continues.  On failure, the loop is immediately exited.  The resulting
      detected_size is 512 KiB too small except in two special cases:
      
      1. If there is no memory, the initial 0 value of detected_size is used, which
         is correct.
      2. If the address space wraps around, detected_size is updated before the
         bailout, so the result is correct.
      
      The patch corrects all cases and was tested with an AWE64 Gold.  Before:
        EMU8000 [0x620]: 3584 Kb on-board memory detected
        asfxload 4GMGSMT.SF2 (4174814 B) fails.
      After:
        EMU8000 [0x620]: 4096 Kb on-board memory detected
        asfxload 4GMGSMT.SF2 succeeds.
      
      I do not have a card with 512 KiB to test with, but by forcibly enabling the
      added conditional I verified on the AWE64 Gold that it detects 512 KiB
      (successfully reading from the first memory location) and does not hang the
      card.
      
      C.f. Bug 46451 https://bugzilla.kernel.org/show_bug.cgi?id=46451Signed-off-by: NDavid Flater <dave@flaterco.com>
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      1338fc97
    • T
      Merge branch 'for-linus' into for-next · a184d4e4
      Takashi Iwai 提交于
      Need to merge the fixes regarding EPSS.
      
      Conflicts:
      	sound/pci/hda/hda_codec.c
      a184d4e4
    • T
      ALSA: hda - Don't trust codec EPSS bit for IDT 92HD83xx & co · c36b5b05
      Takashi Iwai 提交于
      These codecs seem reporting EPSS but require longer delay for the
      proper D3 transition.  For example, D3_STOP_CLOCK_OK bit won't be set
      correctly even after D3.
      
      In this patch, codec->epss flag is overridden for avoid the
      misbehavior.
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      c36b5b05
    • T
      ALSA: hda - Avoid unnecessary parameter read for EPSS · 983f6b93
      Takashi Iwai 提交于
      EPSS parameter should be static, so we can read it once and remember.
      This also allows more easily to override the wrong EPSS capability
      reported from a codec by changing the flag in the codec
      initialization step.
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      983f6b93
    • T
      ALSA: hda - Make clear built-in driver optimization · 5d908ab9
      Takashi Iwai 提交于
      Use unsigned int to make clear that the codes required only for
      modules will be reduced by the compiler optimization.
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      5d908ab9
  2. 27 8月, 2012 1 次提交
  3. 24 8月, 2012 2 次提交
  4. 23 8月, 2012 1 次提交
    • M
      ALSA: hda - add runtime PM support · b8dfc462
      Mengdong Lin 提交于
      Runtime PM can bring more power saving:
      - When the controller is suspended, its parent device will also have a chance
        to suspend.
      - PCI subsystem can choose the lowest power state the controller can signal
        wake up from. This state can be D3cold on platforms with ACPI PM support.
      And runtime PM can provide a gerneral sysfs interface for a system policy
      manager.
      
      Runtime PM support is based on current HDA power saving implementation. The user
      can enable runtime PM on platfroms that provide acceptable latency on transition
      from D3 to D0.
      
      Details:
      - When both power saving and runtime PM are enabled:
        -- If a codec supports 'stop-clock' in D3, it will request suspending the
           controller after it enters D3 and request resuming the controller before
           back to D0. Thus the controller will be suspended only when all codecs are
           suspended and support stop-clock in D3.
        -- User IO operations and HW wakeup signal can resume the controller back to
           D0.
      - If runtime PM is disabled, power saving just works as before.
      - If power saving is disabled, the controller won't be suspended because the
        power usage counter can never be 0.
      
      More about 'stop-clock' feature:
      If a codec can support targeted pass-through operations in D3 state when there
      is no BCLK present on the link, it will set CLKSTOP flag in the supported power
      states and report PS-ClkStopOk when entering D3 state. Please refer to HDA spec
      section 7.3.3.10 Power state and 7.3.4.12 Supported Power State.
      
      [Fixed CONFIG_PM_RUNTIME dependency in hda_intel.c by tiwai]
      Signed-off-by: NMengdong Lin <mengdong.lin@intel.com>
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      b8dfc462
  5. 22 8月, 2012 2 次提交
  6. 21 8月, 2012 6 次提交
  7. 20 8月, 2012 16 次提交
  8. 18 8月, 2012 3 次提交
  9. 16 8月, 2012 2 次提交
  10. 15 8月, 2012 2 次提交