- 10 7月, 2014 1 次提交
-
-
由 Alexandre Belloni 提交于
Having clocks grouped in a subnode is common practice, so move the crystals and the ADC clock under a clocks node for the at91sam9x5 SoC and at91sam9x5 based boards. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 23 5月, 2014 1 次提交
-
-
由 Boris BREZILLON 提交于
Define sam9x5ek's main and slow crystal frequencies. Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 17 5月, 2013 2 次提交
-
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 21 3月, 2013 1 次提交
-
-
由 Richard Genoud 提交于
This add the 1-wire chip present on the CM board to the DTS. As the pin is also used by leds, it's disabled by default. If the board really wants it, it can be enabled in the board DTS. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 07 2月, 2013 1 次提交
-
-
由 Josh Wu 提交于
Default ecc correctable setting is 2bits in 512 bytes. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 05 4月, 2012 1 次提交
-
-
由 Ludovic Desroches 提交于
Because of the inclusion of skeleton.dtsi, the memory node is named "memory" we where not modifying the already included one but creating a new one. It caused bad memory node detection during early_init_dt_scan_memory() so we modify them. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: devicetree-discuss@lists.ozlabs.org
-
- 15 3月, 2012 2 次提交
-
-
Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
Enable the nand in the cpu module with the partition. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-
- 01 3月, 2012 1 次提交
-
-
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
- 03 2月, 2012 1 次提交
-
-
由 Nicolas Ferre 提交于
Device tree include file for the AT91SAM9x5 SoC family. An additional .dtsi file is created to describe the generic SAM9x5 CPU Module (CM). Device tree source files for each Evaluation Kit that are using the generic CPU Module and the carrier board. The selection of available peripherals is done in this .dts file. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-