- 09 10月, 2012 1 次提交
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由 Yegor Yefremov 提交于
FORCE_MAX_ZONEORDER of 12 is needed to allocation more than 4MB of consistent DMA memory (da8xx frame buffer driver). Signed-off-by: NDejan Gacnik <dejan.gacnik@gmail.com> Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 10月, 2012 1 次提交
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由 Olof Johansson 提交于
I mismerged one of the branches that moves around gpio header file usage, and messed up for IOP. This fixes the obvious compilation failures caused by it. Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 29 9月, 2012 3 次提交
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由 Simon Horman 提交于
arm: Add ARM ERRATA 775420 workaround Workaround for the 775420 Cortex-A9 (r2p2, r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance operation aborts with MMU exception, it might cause the processor to deadlock. This workaround puts DSB before executing ISB if an abort may occur on cache maintenance. Based on work by Kouei Abe and feedback from Catalin Marinas. Signed-off-by: NKouei Abe <kouei.abe.cp@rms.renesas.com> [ horms@verge.net.au: Changed to implementation suggested by catalin.marinas@arm.com ] Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Arnd Bergmann 提交于
Remove mach-bcmring as this is no longer maintained or used. Signed-off-by: NChristian Daudt <csd@broadcom.com> Reviewed-by: NJiandong Zheng <jdzheng@broadcom.com> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Alexander Shiyan 提交于
Modern CPUs from CLPS711X-line can operate at frequencies other than 73 MHz. This patch adds simple clock framework for handling all possible CPU rates. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
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- 22 9月, 2012 4 次提交
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由 Thomas Petazzoni 提交于
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
This patch adds a pinctrl driver core for Marvell SoCs plus DT binding documentation. This core driver will be used by SoC family specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net> Conflicts: arch/arm/Kconfig
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由 Thomas Petazzoni 提交于
Until now, the PLAT_ORION configuration option was common to all the Marvell EBU SoCs, and selecting this option had the effect of enabling the MPP code, GPIO code, address decoding and PCIe code from plat-orion, as well as providing access to driver-specific header files from plat-orion/include. However, the Armada 370 and XP SoCs will not use the MPP and GPIO code (instead some proper pinctrl and gpio drivers are in preparation), and generally, we want to move away from plat-orion and instead have everything in mach-mvebu. That said, in the mean time, we want to leverage the driver-specific headers as well as the address decoding code, so we introduce PLAT_ORION_LEGACY. The older Marvell SoCs need to select PLAT_ORION_LEGACY, while the newer Marvell SoCs need to select PLAT_ORION. Of course, when PLAT_ORION_LEGACY is selected, it automatically selects PLAT_ORION. Then, with just PLAT_ORION, you have the address decoding code plus the driver-specific headers. If you add PLAT_ORION_LEGACY to this, you gain the old MPP, GPIO and PCIe code. Again, this is only a temporary solution until we make all Marvell EBU platforms converge into the mach-mvebu directory. This solution avoids duplicating the existing address decoding code into mach-mvebu. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Russell King 提交于
Allow PCI support for Dove to be disabled. Some platforms do not have anything connected to the PCIe ports, so requiring PCI support to be built into the kernel just wastes space, and presents a lot more config options than are necessary. However, select USB_ARCH_HAS_EHCI so that we can still have EHCI support. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 21 9月, 2012 1 次提交
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由 Tony Prisk 提交于
Merged existing board files to a single dt-capable file. Converted irq and timer code to devicetree. Removed existing device files that are no longer required with devicetree support. All existing platform devices are converted to devicetree nodes except PWM. Removed restart.c and moved code into vt8500.c to remove duplicate PMC code. Signed-off-by: NTony Prisk <linux@prisktech.co.nz> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 20 9月, 2012 2 次提交
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由 Simon Arlott 提交于
The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC. http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses. This is accounted for by the ranges property in the /soc node in the device tree. The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system. http://www.raspberrypi.org/. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since. Signed-off-by: NChris Boot <bootc@bootc.net> Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NDom Cobley <popcornmix@gmail.com> Signed-off-by: NDom Cobley <dc4@broadcom.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Wade Farnsworth 提交于
As specified by ftrace-design.txt, TIF_SYSCALL_TRACEPOINT was added, as well as NR_syscalls in asm/unistd.h. Additionally, __sys_trace was modified to call trace_sys_enter and trace_sys_exit when appropriate. Tests #2 - #4 of "perf test" now complete successfully. Signed-off-by: NSteven Walter <stevenrwalter@gmail.com> Signed-off-by: NWade Farnsworth <wade_farnsworth@mentor.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 9月, 2012 1 次提交
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由 Linus Walleij 提交于
This feature was added in 2009, I've been using it off and on and never had any problems with it on my systems. I cannot see why it needs to be marked experimental, make it a normal feature and let us discover its possible shortcomings as people try to turn it on instead. Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 9月, 2012 1 次提交
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由 Rob Herring 提交于
Convert vexpress to multi-platform. This always enables vexpress DT and makes it the default v7 platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com>
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- 14 9月, 2012 2 次提交
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由 Rob Herring 提交于
This lets us build a multiplatform kernel for experimental purposes. However, it will not be useful for any real work, because it relies on a number of useful things to be disabled for now: * SMP support must be turned off because of conflicting symbols. Marc Zyngier has proposed a solution by adding a new SOC operations structure to hold indirect function pointers for these, but that work is currently stalled * We turn on SPARSE_IRQ unconditionally, which is not supported on most platforms. Each of them is currently in a different state, but most are being worked on. * A common clock framework is in place since v3.4 but not yet being used. Work on this is on its way. * DEBUG_LL for early debugging is currently disabled. * THUMB2_KERNEL does not work with allyesconfig because the kernel gets too big [Rob Herring]: Rebased to not be dependent on the mass mach header rename. As a result, omap2plus, imx, mxs and ux500 are not converted. Highbank, picoxcell, mvebu, and socfpga are converted. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Acked-by: NJamie Iles <jamie@jamieiles.com> Cc: Dinh Nguyen <dinguyen@altera.com>
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由 Rob Herring 提交于
Most platforms don't need mach/gpio.h and it prevents multi-platform kernel images. Add CONFIG_NEED_MACH_GPIO_H and make platforns select it if they need gpio.h. This is platforms that define __GPIOLIB_COMPLEX or have lots of implicit includes pulled in by mach/gpio.h. at91 and omap have gpio clean-up pending and can drop CONFIG_NEED_MACH_GPIO_H once that is in. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 9月, 2012 2 次提交
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由 Stephen Warren 提交于
Even though system suspend/resume hasn't been validated on Tegra yet, this Kconfig option needs to be enabled so that system shutdown is reliable on an SMP system. Without it, I2C interrupts may be routed to CPU0, whereas shutdown code may be running on CPU1, causing I2C timeouts, preventing communication with the external PMIC. This reverts 3d5e8af4 "ARM: disable SUSPEND/ARCH_SUSPEND_POSSIBLE for ARCH_TEGRA". Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Prashant Gaikwad 提交于
This patch converts tegra clock code to generic clock framework in following way: - Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c) - Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk. - Initialize all clock data statically. (tegraXX_clocks_data.c) Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions. Removed init function. It's functionality is splitted into recalc_rate and is_enabled. Static initialization is used since slab is not up in .init_early and clock is needed to be initialized before clockevent/clocksource initialization. Macros redefined for clk_tegra. Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This is to move quickly to generic common clock framework so that other dependent features will not be blocked (such as DT binding). Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20 and Tegra30. Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 05 9月, 2012 1 次提交
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由 Linus Walleij 提交于
Old platforms using ancient gettimeoffset() and other arcane APIs are standing in the way of cleaning up the ARM kernel. The gettimeoffset() was also broken: it would try to read out the timer counter value, while this would not work (the counter statically returns the initially programmed value) so the implementation would anyway fall back to a homebrew version of jiffie calculation. This is an attempt at blind-coding a generic time and clocksource driver for the platform by way of a datasheet and looking at the old code. Tested-by: NGreg Ungerer <gerg@snapgear.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 9月, 2012 1 次提交
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由 Nicolas Pitre 提交于
Now that ATAGS support is well contained, we can easily remove it from the kernel build if so desired. It has to explicitly be disabled, and only when DT support is selected. Note: disabling kernel ATAGS support does not prevent the usage of CONFIG_ARM_ATAG_DTB_COMPAT. Signed-off-by: NNicolas Pitre <nico@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 9月, 2012 3 次提交
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由 Linus Walleij 提交于
This converts the Nomadik to using pin control using the driver for the STN8815 ASIC. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Shawn Guo 提交于
With icoll and gpio interrupt controllers adopt irqdomain support and all interrupt nubmers are retrieved from device tree, it's safe to select SPARSE_IRQ for mxs now. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
As part of multi-platform effort, let's enable MULTI_IRQ_HANDLER for mach-mxs and remove entry-macro.S. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 29 8月, 2012 1 次提交
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由 Marek Szyprowski 提交于
Contiguous Memory Allocator requires only paging and MMU enabled not particular CPU architectures, so there is no need for strict dependency on CPU type. This enables to use CMA on some older ARM v5 systems which also might need large contiguous blocks for the multimedia processing hw modules. Reported-by: NPrabhakar Lad <prabhakar.lad@ti.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Tested-by: NPrabhakar Lad <prabhakar.lad@ti.com>
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- 28 8月, 2012 1 次提交
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由 Barry Song 提交于
Now we have primaII, but will include Marco and Polo in mach-prima2 as well. We add Kconfig menu so that we can select necessary SoC features. Signed-off-by: NBarry Song <Baohua.Song@csr.com>
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- 26 8月, 2012 1 次提交
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由 Roland Stigge 提交于
This patch removes the ARM architecture mach-pnx4008. No direct support or user feedback since 2006. Acknowledgements from NXP/Philips and Linux arm-soc maintainers. Signed-off-by: NRoland Stigge <stigge@antcom.de>
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- 25 8月, 2012 2 次提交
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由 Linus Walleij 提交于
This converts the ARM RealView machine over to using the common clock. The approach is similar to the one used for the Integrator, and we're reusing the ICST wrapper code. We have to put the clock intialization in the timer init function for the clocks to be available when initializing the timer, keeping them in early_init() is too early for the common clk. Since we now have to go down and compile drivers/clk/versatile a CONFIG_COMMON_CLK_VERSATILE symbol has been added so the proper code gets compiled into the kernel for either machine. A leftover CLK_VERSATILE in the Integrator Kconfig was fixed up to use the new symbol as well. Tested on ARM RealView PB1176. Cc: Pawel Moll <pawel.moll@arm.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Binghua Duan 提交于
Commit 02c981c0 only implements a little part of primaII clk tree due to common clk framework was not ready at that time. This patch converts the old driver to common clk and finish the full clk tree. Signed-off-by: NBinghua Duan <Binghua.Duan@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 23 8月, 2012 2 次提交
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由 Arnd Bergmann 提交于
The i.MX cpufreq implementation uses the CPU_FREQ_TABLE helpers, so it needs to select that code to be built. This problem has apparently existed since the i.MX cpufreq code was first merged in v2.6.37. Building IMX without CPU_FREQ_TABLE results in: arch/arm/plat-mxc/built-in.o: In function `mxc_cpufreq_exit': arch/arm/plat-mxc/cpufreq.c:173: undefined reference to `cpufreq_frequency_table_put_attr' arch/arm/plat-mxc/built-in.o: In function `mxc_set_target': arch/arm/plat-mxc/cpufreq.c:84: undefined reference to `cpufreq_frequency_table_target' arch/arm/plat-mxc/built-in.o: In function `mxc_verify_speed': arch/arm/plat-mxc/cpufreq.c:65: undefined reference to `cpufreq_frequency_table_verify' arch/arm/plat-mxc/built-in.o: In function `mxc_cpufreq_init': arch/arm/plat-mxc/cpufreq.c:154: undefined reference to `cpufreq_frequency_table_cpuinfo' arch/arm/plat-mxc/cpufreq.c:162: undefined reference to `cpufreq_frequency_table_get_attr' Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NShawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Yong Shen <yong.shen@linaro.org> Cc: stable@vger.kernel.org
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由 Will Deacon 提交于
The PMU reservation mechanism was originally intended to allow OProfile and perf-events to co-ordinate over access to the CPU PMU. Since then, OProfile for ARM has moved to using perf as its backend, so the reservation code is no longer used. This patch removes the reservation code for the CPU PMU on ARM. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 15 8月, 2012 1 次提交
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由 Stephen Boyd 提交于
Seems that Thomas' and my patches collided during the last merge window. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 8月, 2012 1 次提交
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由 Linus Walleij 提交于
This converts the U300 to use sparse IRQs, which is simple now that the number of machines are reduced. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 8月, 2012 1 次提交
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由 Stephen Boyd 提交于
Now that ARM has implemented its spinlocks with tickets we don't need to use the generic lockbreak algorithm. Remove the Kconfig from ARM so that we use the arch_spin_is_contended() definition from the asm header. This also saves a word in each lock because we don't need the break_lock member anymore. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 9月, 2012 1 次提交
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由 Stefano Stabellini 提交于
Changes in v5: - make XEN_DOM0 depend on XEN; - avoid "select XEN_DOM0" in XEN. Changes in v2: - mark Xen guest support on ARM as EXPERIMENTAL. Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com> CC: Sergei Shtylyov <sshtylyov@mvista.com>
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- 01 8月, 2012 1 次提交
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由 Bryan Wu 提交于
Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NBryan Wu <bryan.wu@canonical.com>
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- 31 7月, 2012 2 次提交
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由 Will Deacon 提交于
Rather than #define the options manually in the architecture code, add Kconfig options for them and select them there instead. This also allows us to select the compat IPC version parsing automatically for platforms using the old compat IPC interface. Reported-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Catalin Marinas 提交于
Introduce CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE and use this instead of the multitude of #if defined() checks in atomic64_test.c Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 27 7月, 2012 1 次提交
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由 Andrew Lunn 提交于
Both IRQ and GPIO controllers can now be represented in DT. The IRQ controllers are setup first, and then the GPIO controllers. Interrupts for GPIO lines are placed directly after the main interrupts in the interrupt space. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Tested-by: NJosh Coombs <josh.coombs@gmail.com> Tested-by: NSimon Baatz <gmbnomis@gmail.com>
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- 26 7月, 2012 2 次提交
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由 Rob Herring 提交于
Move iop33x and iop32x PCI to fixed i/o mapping and remove io.h. This changes the PCI bus addresses from the cpu address to 0 based. It appears that there is translation h/w for this, but its untested. Not sure what to do with io_offset. I think it should always be 0. AFAICT, PCI setup is skipped if the ATU is already setup. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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由 Rob Herring 提交于
Move mv78xx0 PCI to fixed i/o mapping and remove io.h. This changes the PCI bus addresses from the cpu address to 0 based. It appears that there is translation h/w for this, but its untested. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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