1. 08 4月, 2017 4 次提交
  2. 10 3月, 2017 1 次提交
  3. 25 1月, 2017 2 次提交
  4. 04 10月, 2015 1 次提交
  5. 09 8月, 2015 2 次提交
  6. 10 1月, 2015 1 次提交
  7. 04 10月, 2014 1 次提交
  8. 31 1月, 2014 1 次提交
  9. 03 12月, 2013 2 次提交
    • X
      xhci: replace xhci_read_64() with readq() · e8b37332
      Xenia Ragiadakou 提交于
      Function xhci_read_64() is used to read 64bit xHC registers residing in MMIO.
      On 32bit systems, xHC registers need to be read with 32bit accesses by
      reading first the lower 32bits and then the higher 32bits.
      
      Replace all calls to xhci_read_64() with calls to readq() and include
      asm-generic/io-64-nonatomic-lo-hi.h header file, so that if the system
      is not 64bit, readq() will read registers in 32bit chunks with low-high order.
      
      This is done to reduce code duplication since 64bit low-high read logic
      is already implemented and to take advantage of inherent "atomic" 64bit
      read operations on 64bit systems.
      Signed-off-by: NXenia Ragiadakou <burzalodowa@gmail.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      e8b37332
    • X
      xhci: replace xhci_readl() with readl() · b0ba9720
      Xenia Ragiadakou 提交于
      Function xhci_readl() is used to read 32bit xHC registers residing in MMIO
      address space. It takes as first argument a pointer to the xhci_hcd although
      it does not use it. xhci_readl() internally simply calls readl(). This creates
      an illusion that xhci_readl() is an xhci specific function that has to be
      called in a context where a pointer to xhci_hcd is available.
      
      Remove the unnecessary xhci_readl() wrapper function and replace its calls to
      with calls to readl() to make the code more straightforward.
      Signed-off-by: NXenia Ragiadakou <burzalodowa@gmail.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      b0ba9720
  10. 14 8月, 2013 1 次提交
    • X
      xhci: add traces for debug messages in xhci_address_device() · 84a99f6f
      Xenia Ragiadakou 提交于
      This patch declares an event class for trace events that
      trace messages with variadic arguments, called xhci_log_msg,
      and defines a trace event for tracing the debug messages in
      xhci_address_device() function, called xhci_dbg_address.
      
      In order to implement this type of trace events, a wrapper function,
      called xhci_dbg_trace(), was created that records the format string
      and variadic arguments into a va_format structure which is passed as
      argument to the tracepoints of the class xhci_log_msg.
      
      All the xhci_dbg() calls in xhci_address_device() are replaced
      with calls to xhci_dbg_trace(). The functionality of xhci_dbg()
      log messages was not removed though, but it is placed inside
      xhci_dbg_trace().
      
      This trace event aims to give the ability to the user or the
      developper to isolate and trace the debug messages generated
      when an Address Device Command is issued to xHC.
      Signed-off-by: NXenia Ragiadakou <burzalodowa@gmail.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      84a99f6f
  11. 15 6月, 2013 1 次提交
  12. 06 6月, 2013 1 次提交
    • J
      usb: xhci-dbg: Display endpoint number and direction in context dump · 01c5f447
      Julius Werner 提交于
      When CONFIG_XHCI_HCD_DEBUGGING is activated, the XHCI driver can dump
      device and input contexts to the console. The endpoint contexts in that
      dump are labeled "Endpoint N Context", where N is the XHCI endpoint
      index (DCI - 1). This can be very confusing, especially for people who
      are not that familiar with the XHCI specification. This patch introduces
      an xhci_get_endpoint_address function (as a counterpart to the reverse
      xhci_get_endpoint_index), and uses it to additionally display the
      endpoint number and direction when dumping contexts, which are much more
      commonly used concepts in USB.
      Signed-off-by: NJulius Werner <jwerner@chromium.org>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      01c5f447
  13. 26 10月, 2012 1 次提交
  14. 11 4月, 2012 1 次提交
  15. 03 6月, 2011 2 次提交
  16. 03 5月, 2011 1 次提交
    • M
      xhci: Make xHCI driver endian-safe · 28ccd296
      Matt Evans 提交于
      This patch changes the struct members defining access to xHCI device-visible
      memory to use __le32/__le64 where appropriate, and then adds swaps where
      required.  Checked with sparse that all accesses are correct.
      
      MMIO accesses use readl/writel so already are performed LE, but prototypes
      now reflect this with __le*.
      
      There were a couple of (debug) instances of DMA pointers being truncated to
      32bits which have been fixed too.
      Signed-off-by: NMatt Evans <matt@ozlabs.org>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      28ccd296
  17. 23 2月, 2011 1 次提交
  18. 20 2月, 2011 1 次提交
  19. 21 5月, 2010 1 次提交
    • S
      USB: xhci: Correct assumptions about number of rings per endpoint. · e9df17eb
      Sarah Sharp 提交于
      Much of the xHCI driver code assumes that endpoints only have one ring.
      Now an endpoint can have one ring per enabled stream ID, so correct that
      assumption.  Use functions that translate the stream_id field in the URB
      or the DMA address of a TRB into the correct stream ring.
      
      Correct the polling loop to print out all enabled stream rings.  Make the
      URB cancellation routine find the correct stream ring if the URB has
      stream_id set.  Make sure the URB enqueueing routine does the same.  Also
      correct the code that handles stalled/halted endpoints.
      
      Check that commands and registers that can take stream IDs handle them
      properly.  That includes ringing an endpoint doorbell, resetting a
      stalled/halted endpoint, and setting a transfer ring dequeue pointer
      (since that command can set the dequeue pointer in a stream context or an
      endpoint context).
      
      Correct the transfer event handler to translate a TRB DMA address into the
      stream ring it was enqueued to.  Make the code to allocate and prepare TD
      structures adds the TD to the right td_list for the stream ring.  Make
      sure the code to give the first TRB in a TD to the hardware manipulates
      the correct stream ring.
      
      When an endpoint stalls, store the stream ID of the stream ring that
      stalled in the xhci_virt_ep structure.  Use that instead of the stream ID
      in the URB, since an URB may be re-used after it is given back after a
      non-control endpoint stall.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      e9df17eb
  20. 03 3月, 2010 2 次提交
    • S
      USB: xhci: Fix compile issues with xhci_get_slot_state() · 9c9a7dbf
      Sarah Sharp 提交于
      Randy Dunlap reported this error when compiling the xHCI driver:
      
      linux-next-20100104/drivers/usb/host/xhci.h:1214:
      sorry, unimplemented: inlining failed in call to 'xhci_get_slot_state': function body not available
      
      The xhci_get_slot_state() function belongs in xhci-dbg.c, since it
      involves debugging internal xHCI structures.  However, it is only used in
      xhci-hcd.c.  Some toolchains may have issues since the inlined function
      body is not in the xhci.h header file.  Remove the inline keyword to avoid
      this.
      Reported-by: NRandy Dunlap <randy.dunlap@oracle.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Acked-by: NRandy Dunlap <randy.dunlap@oracle.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      9c9a7dbf
    • S
      USB: xhci: Notify the xHC when a device is reset. · 2a8f82c4
      Sarah Sharp 提交于
      When a USB device is reset, the xHCI hardware must know, in order to match
      the device state and disable all endpoints except control endpoint 0.
      Issue a Reset Device command after a USB device is successfully reset.
      Wait on the command to finish, and then cache or free the disabled
      endpoint rings.
      
      There are four different USB device states that the xHCI hardware tracks:
       - disabled/enabled - device connection has just been detected,
       - default - the device has been reset and has an address of 0,
       - addressed - the device has a non-zero address but no configuration has
         been set,
       - configured - a set configuration succeeded.
      
      The USB core may issue a port reset when a device is in any state, but the
      Reset Device command will fail for a 0.96 xHC if the device is not in the
      addressed or configured state.  Don't consider this failure as an error,
      but don't free any endpoint rings if this command fails.
      
      A storage driver may request that the USB device be reset during error
      handling, so use GPF_NOIO instead of GPF_KERNEL while allocating memory
      for the Reset Device command.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      2a8f82c4
  21. 23 9月, 2009 1 次提交
  22. 29 7月, 2009 4 次提交
    • J
      USB: xhci: Support for 64-byte contexts · d115b048
      John Youn 提交于
      Adds support for controllers that use 64-byte contexts.  The following context
      data structures are affected by this: Device, Input, Input Control, Endpoint,
      and Slot.  To accommodate the use of either 32 or 64-byte contexts, a Device or
      Input context can only be accessed through functions which look-up and return
      pointers to their contained contexts.
      Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
      Acked-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      d115b048
    • S
      USB: xhci: Always align output device contexts to 64 bytes. · 28c2d2ef
      Sarah Sharp 提交于
      Make sure the xHCI output device context is 64-byte aligned.  Previous
      code was using the same structure for both the output device context and
      the input control context.  Since the structure had 32 bytes of flags
      before the device context, the output device context wouldn't be 64-byte
      aligned.  Define a new structure to use for the output device context and
      clean up the debugging for these two structures.
      
      The copy of the device context in the input control context does *not*
      need to be 64-byte aligned.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      28c2d2ef
    • S
      USB: xhci: Represent 64-bit addresses with one u64. · 8e595a5d
      Sarah Sharp 提交于
      There are several xHCI data structures that use two 32-bit fields to
      represent a 64-bit address.  Since some architectures don't support 64-bit
      PCI writes, the fields need to be written in two 32-bit writes.  The xHCI
      specification says that if a platform is incapable of generating 64-bit
      writes, software must write the low 32-bits first, then the high 32-bits.
      Hardware that supports 64-bit addressing will wait for the high 32-bit
      write before reading the revised value, and hardware that only supports
      32-bit writes will ignore the high 32-bit write.
      
      Previous xHCI code represented 64-bit addresses with two u32 values.  This
      lead to buggy code that would write the 32-bits in the wrong order, or
      forget to write the upper 32-bits.  Change the two u32s to one u64 and
      create a function call to write all 64-bit addresses in the proper order.
      This new function could be modified in the future if all platforms support
      64-bit writes.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      8e595a5d
    • R
      USB: xhci: fix less- and greater than confusion · d8f1a5ed
      Roel Kluin 提交于
      Without this change the loops won't start
      Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
      Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      d8f1a5ed
  23. 16 6月, 2009 7 次提交
    • S
      USB: xhci: Remove packed attribute from structures. · 98441973
      Sarah Sharp 提交于
      The packed attribute allows gcc to muck with the alignment of data
      structures, which may lead to byte-wise writes that break atomicity of
      writes.  Packed should only be used when the compile may add undesired
      padding to the structure.  Each element of the structure will be aligned
      by C based on its size and the size of the elements around it.  E.g. a u64
      would be aligned on an 8 byte boundary, the next u32 would be aligned on a
      four byte boundary, etc.
      
      Since most of the xHCI structures contain only u32 bit values, removing
      the packed attribute for them should be harmless.  (A future patch will
      change some of the twin 32-bit address fields to one 64-bit field, but all
      those places have an even number of 32-bit fields before them, so the
      alignment should be correct.)  Add BUILD_BUG_ON statements to check that
      the compiler doesn't add padding to the data structures that have a
      hardware-defined layout.
      
      While we're modifying the registers, change the name of intr_reg to
      xhci_intr_reg to avoid global conflicts.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      98441973
    • S
      USB: xhci: Avoid global namespace pollution. · 23e3be11
      Sarah Sharp 提交于
      Make all globally visible functions start with xhci_ and mark functions as
      static if they're only called within the same C file.  Fix some long lines
      while we're at it.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      23e3be11
    • G
      USB: xhci: fix lots of compiler warnings. · 700e2052
      Greg Kroah-Hartman 提交于
      Turns out someone never built this code on a 64bit platform.
      
      Someone owes me a beer...
      Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      700e2052
    • S
      USB: xhci: Allocate and address USB devices · 3ffbba95
      Sarah Sharp 提交于
      xHCI needs to get a "Slot ID" from the host controller and allocate other
      data structures for every USB device.  Make usb_alloc_dev() and
      usb_release_dev() allocate and free these device structures.  After
      setting up the xHC device structures, usb_alloc_dev() must wait for the
      hardware to respond to an Enable Slot command.  usb_alloc_dev() fires off
      a Disable Slot command and does not wait for it to complete.
      
      When the USB core wants to choose an address for the device, the xHCI
      driver must issue a Set Address command and wait for an event for that
      command.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3ffbba95
    • S
      USB: xhci: Root hub support. · 0f2a7930
      Sarah Sharp 提交于
      Add functionality for getting port status and hub descriptor for xHCI root
      hubs.  This is WIP because the USB 3.0 hub descriptor is different from
      the USB 2.0 hub descriptor.  For now, we lie about the root hub descriptor
      because the changes won't effect how the core talks to the root hub.
      Later we will need to add the USB 3.0 hub descriptor for real hubs, and
      this code might change.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      0f2a7930
    • S
      USB: xhci: No-op command queueing and irq handler. · 7f84eef0
      Sarah Sharp 提交于
      xHCI host controllers can optionally implement a no-op test.  This
      simple test ensures the OS has correctly setup all basic data structures
      and can correctly respond to interrupts from the host controller
      hardware.
      
      There are two rings exercised by the no-op test:  the command ring, and
      the event ring.
      
      The host controller driver writes a no-op command TRB to the command
      ring, and rings the doorbell for the command ring (the first entry in
      the doorbell array).  The hardware receives this event, places a command
      completion event on the event ring, and fires an interrupt.
      
      The host controller driver sees the interrupt, and checks the event ring
      for TRBs it can process, and sees the command completion event.  (See
      the rules in xhci-ring.c for who "owns" a TRB.  This is a simplified set
      of rules, and may not contain all the details that are in the xHCI 0.95
      spec.)
      
      A timer fires every 60 seconds to debug the state of the hardware and
      command and event rings.  This timer only runs if
      CONFIG_USB_XHCI_HCD_DEBUGGING is 'y'.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      7f84eef0
    • S
      USB: xhci: Ring allocation and initialization. · 0ebbab37
      Sarah Sharp 提交于
      Allocate basic xHCI host controller data structures.  For every xHC, there
      is a command ring, an event ring, and a doorbell array.
      
      The doorbell array is used to notify the host controller that work has
      been enqueued onto one of the rings.  The host controller driver enqueues
      commands on the command ring.  The HW enqueues command completion events
      on the event ring and interrupts the system (currently using PCI
      interrupts, although the xHCI HW will use MSI interrupts eventually).
      
      All rings and the doorbell array must be allocated by the xHCI host
      controller driver.
      
      Each ring is comprised of one or more segments, which consists of 16-byte
      Transfer Request Blocks (TRBs) that can be chained to form a Transfer
      Descriptor (TD) that represents a multiple-buffer request.  Segments are
      linked into a ring using Link TRBs, which means they are dynamically
      growable.
      
      The producer of the ring enqueues a TD by writing one or more TRBs in the
      ring and toggling the TRB cycle bit for each TRB.  The consumer knows it
      can process the TRB when the cycle bit matches its internal consumer cycle
      state for the ring.  The consumer cycle state is toggled an odd amount of
      times in the ring.
      
      An example ring (a ring must have a minimum of 16 TRBs on it, but that's
      too big to draw in ASCII art):
      
                    chain  cycle
                     bit    bit
       ------------------------
      | TD A TRB 1 |  1  |  1  |<-------------  <-- consumer dequeue ptr
       ------------------------               |     consumer cycle state = 1
      | TD A TRB 2 |  1  |  1  |              |
       ------------------------               |
      | TD A TRB 3 |  0  |  1  |  segment 1   |
       ------------------------               |
      | TD B TRB 1 |  1  |  1  |              |
       ------------------------               |
      | TD B TRB 2 |  0  |  1  |              |
       ------------------------               |
      | Link TRB   |  0  |  1  |-----         |
       ------------------------     |         |
                                    |         |
                    chain  cycle    |         |
                     bit    bit     |         |
       ------------------------     |         |
      | TD C TRB 1 |  0  |  1  |<----         |
       ------------------------               |
      | TD D TRB 1 |  1  |  1  |              |
       ------------------------               |
      | TD D TRB 2 |  1  |  1  |   segment 2  |
       ------------------------               |
      | TD D TRB 3 |  1  |  1  |              |
       ------------------------               |
      | TD D TRB 4 |  1  |  1  |              |
       ------------------------               |
      | Link TRB   |  1  |  1  |-----         |
       ------------------------     |         |
                                    |         |
                    chain  cycle    |         |
                     bit    bit     |         |
       ------------------------     |         |
      | TD D TRB 5 |  1  |  1  |<----         |
       ------------------------               |
      | TD D TRB 6 |  0  |  1  |              |
       ------------------------               |
      | TD E TRB 1 |  0  |  1  |   segment 3  |
       ------------------------               |
      |            |  0  |  0  |              | <-- producer enqueue ptr
       ------------------------               |
      |            |  0  |  0  |              |
       ------------------------               |
      | Link TRB   |  0  |  0  |---------------
       ------------------------
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      0ebbab37