1. 19 1月, 2018 3 次提交
  2. 18 1月, 2018 7 次提交
  3. 17 1月, 2018 5 次提交
  4. 16 1月, 2018 1 次提交
  5. 15 1月, 2018 1 次提交
    • B
      mmc: sdhci-esdhc-imx: Fix i.MX53 eSDHCv3 clock · 499ed50f
      Benoît Thébaudeau 提交于
      Commit 5143c953 ("mmc: sdhci-esdhc-imx: Allow all supported
      prescaler values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR
      mode, thus bypassing the SD clock frequency prescaler, in order to be
      able to get higher SD clock frequencies in some contexts. However, that
      commit missed the fact that this value is illegal on the eSDHCv3
      instance of the i.MX53. This seems to be the only exception on i.MX,
      this value being legal even for the eSDHCv2 instances of the i.MX53.
      
      Fix this issue by changing the minimum prescaler value if the i.MX53
      eSDHCv3 is detected. According to the i.MX53 reference manual, if
      DLLCTRL[10] can be set, then the controller is eSDHCv3, else it is
      eSDHCv2.
      
      This commit fixes the following issue, which was preventing the i.MX53
      Loco (IMX53QSB) board from booting Linux 4.15.0-rc5:
      [    1.882668] mmcblk1: error -84 transferring data, sector 2048, nr 8, cmd response 0x900, card status 0xc00
      [    2.002255] mmcblk1: error -84 transferring data, sector 2050, nr 6, cmd response 0x900, card status 0xc00
      [   12.645056] mmc1: Timeout waiting for hardware interrupt.
      [   12.650473] mmc1: sdhci: ============ SDHCI REGISTER DUMP ===========
      [   12.656921] mmc1: sdhci: Sys addr:  0x00000000 | Version:  0x00001201
      [   12.663366] mmc1: sdhci: Blk size:  0x00000004 | Blk cnt:  0x00000000
      [   12.669813] mmc1: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
      [   12.676258] mmc1: sdhci: Present:   0x01f8028f | Host ctl: 0x00000013
      [   12.682703] mmc1: sdhci: Power:     0x00000002 | Blk gap:  0x00000000
      [   12.689148] mmc1: sdhci: Wake-up:   0x00000000 | Clock:    0x0000003f
      [   12.695594] mmc1: sdhci: Timeout:   0x0000008e | Int stat: 0x00000000
      [   12.702039] mmc1: sdhci: Int enab:  0x107f004b | Sig enab: 0x107f004b
      [   12.708485] mmc1: sdhci: AC12 err:  0x00000000 | Slot int: 0x00001201
      [   12.714930] mmc1: sdhci: Caps:      0x07eb0000 | Caps_1:   0x08100810
      [   12.721375] mmc1: sdhci: Cmd:       0x0000163a | Max curr: 0x00000000
      [   12.727821] mmc1: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x00000000
      [   12.734265] mmc1: sdhci: Resp[2]:   0x00000000 | Resp[3]:  0x00000000
      [   12.740709] mmc1: sdhci: Host ctl2: 0x00000000
      [   12.745157] mmc1: sdhci: ADMA Err:  0x00000001 | ADMA Ptr: 0xc8049200
      [   12.751601] mmc1: sdhci: ============================================
      [   12.758110] print_req_error: I/O error, dev mmcblk1, sector 2050
      [   12.764135] Buffer I/O error on dev mmcblk1p1, logical block 0, lost sync page write
      [   12.775163] EXT4-fs (mmcblk1p1): mounted filesystem without journal. Opts: (null)
      [   12.782746] VFS: Mounted root (ext4 filesystem) on device 179:9.
      [   12.789151] mmcblk1: response CRC error sending SET_BLOCK_COUNT command, card status 0x900
      Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
      Reported-by: NWladimir J. van der Laan <laanwj@gmail.com>
      Tested-by: NWladimir J. van der Laan <laanwj@gmail.com>
      Fixes: 5143c953 ("mmc: sdhci-esdhc-imx: Allow all supported prescaler values")
      Cc: <stable@vger.kernel.org> # v4.13+
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      499ed50f
  6. 12 1月, 2018 1 次提交
  7. 11 1月, 2018 3 次提交
  8. 09 1月, 2018 3 次提交
  9. 04 1月, 2018 2 次提交
    • A
      mmc:host:sdhci-pci:Addition of Arasan PCI Controller with integrated phy. · d72d72cd
      Atul Garg 提交于
      The Arasan Controller is based on a FPGA platform and has integrated phy
      with specific registers used during initialization and
      management of different modes. The phy and the controller are integrated
      and registers are very specific to Arasan.
      
      Arasan being an IP provider, licenses these IPs to various companies for
      integration of IP in custom SOCs. The custom SOCs define own register
      map depending on how bits are tied inside the SOC for phy registers,
      depending on SOC memory plan and hence will require own platform drivers.
      
      If more details on phy registers are required, an interface document is
      hosted at https://arasan.com/NF/eMMC5.1 PHY Programming in Linux.pdf.
      Signed-off-by: NAtul Garg <agarg@arasan.com>
      Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      d72d72cd
    • A
      mmc: s3mci: mark debug_regs[] as static · 2bd7b4aa
      Arnd Bergmann 提交于
      The global array clashes with a newly added symbol of the same name:
      
      drivers/staging/ccree/cc_debugfs.o:(.data+0x0): multiple definition of `debug_regs'
      drivers/mmc/host/s3cmci.o:(.data+0x70): first defined here
      
      We should fix both, this one addresses the s3cmci driver by removing
      the symbol from the global namespace. While at it, this separates
      the declaration from the type definition and makes the variable const.
      
      Fixes: 9bdd203b ("s3cmci: add debugfs support for examining driver and hardware state")
      Fixes: b3ec9a67 ("staging: ccree: staging: ccree: replace sysfs by debugfs interface")
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      2bd7b4aa
  10. 21 12月, 2017 1 次提交
  11. 19 12月, 2017 6 次提交
  12. 18 12月, 2017 7 次提交