1. 28 6月, 2011 1 次提交
  2. 20 6月, 2011 2 次提交
  3. 10 3月, 2011 1 次提交
  4. 24 9月, 2010 1 次提交
    • S
      omap4: Fix bootup crash observed with higher CPU clocks · e7193cc8
      Santosh Shilimkar 提交于
      This patch is temporary fix to below crash. This is observed when
      CPU is clocked more than 600 MHz.
      
      Unhandled fault: imprecise external abort (0x1406) at 0xbf9ef65c
      Internal error: : 1406 [#1] PREEMPT SMP
      last sysfs file:
      Modules linked in:
      CPU: 0    Not tainted  (2.6.36-rc3+ #18)
      PC is at kernel_thread_helper+0x0/0x14
      LR is at kernel_thread_helper+0x0/0x14
      pc : [<c003ce14>]    lr : [<c003ce14>]    psr: 00000093
      sp : dc83bff8  ip : 00000000  fp : 00000000
      r10: 00000000  r9 : 00000000  r8 : 00000000
      r7 : 00000013  r6 : c003ce28  r5 : c008935c  r4 : 00000000
      r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : 00000000
      Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      Control: 10c53c7f  Table: 8000404a  DAC: 00000017
      Process swapper (pid: 2, stack limit = 0xdc83a2f0)
      Stack: (0xdc83bff8 to 0xdc83c000)
      bfe0: 00000000 ffffffff
      [<c003ce14>] (kernel_thread_helper+0x0/0x14) from [<fffffffe>] (0xfffffffe)
      Code: c03a0ba3 c03a5fcb c045c880 c0394035 (eb017701)
      ---[ end trace 1b75b31a2719ed1c ]---
      
      The timer hwmod adaptation will eventually fix it in a proper way.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      e7193cc8
  5. 10 6月, 2010 1 次提交
    • T
      omap: DMTIMER: Ack pending interrupt always when stopping a timer · 856f1914
      Tero Kristo 提交于
      The kernel timer queue is being run currently from a GP timer running in a one
      shot mode, which works in a way that when it expires, it will also stop.
      Usually during this situation, the interrupt handler will ack the interrupt,
      load a new value to the timer and start it again. During suspend, the
      situation is slightly different, as we disable interrupts just before
      timekeeping is suspended, which leaves a small window where the timer can
      expire before it is stopped, and will leave the interrupt flag pending.
      This pending interrupt will prevent ARM sleep entry, thus now we ack it always
      when we are attempting to stop a timer.
      Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
      Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
      [tony@atomide.com: removed the ifdef to make the patch cover omap1 also]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      856f1914
  6. 21 5月, 2010 1 次提交
  7. 24 2月, 2010 1 次提交
  8. 16 2月, 2010 2 次提交
  9. 22 1月, 2010 1 次提交
  10. 21 10月, 2009 1 次提交
    • T
      omap: headers: Move remaining headers from include/mach to include/plat · ce491cf8
      Tony Lindgren 提交于
      Move the remaining headers under plat-omap/include/mach
      to plat-omap/include/plat. Also search and replace the
      files using these headers to include using the right path.
      
      This was done with:
      
      #!/bin/bash
      mach_dir_old="arch/arm/plat-omap/include/mach"
      plat_dir_new="arch/arm/plat-omap/include/plat"
      headers=$(cd $mach_dir_old && ls *.h)
      omap_dirs="arch/arm/*omap*/ \
      drivers/video/omap \
      sound/soc/omap"
      other_files="drivers/leds/leds-ams-delta.c \
      drivers/mfd/menelaus.c \
      drivers/mfd/twl4030-core.c \
      drivers/mtd/nand/ams-delta.c"
      
      for header in $headers; do
      	old="#include <mach\/$header"
      	new="#include <plat\/$header"
      	for dir in $omap_dirs; do
      		find $dir -type f -name \*.[chS] | \
      			xargs sed -i "s/$old/$new/"
      	done
      	find drivers/ -type f -name \*omap*.[chS] | \
      		xargs sed -i "s/$old/$new/"
      	for file in $other_files; do
      		sed -i "s/$old/$new/" $file
      	done
      done
      
      for header in $(ls $mach_dir_old/*.h); do
      	git mv $header $plat_dir_new/
      done
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      ce491cf8
  11. 20 10月, 2009 1 次提交
  12. 29 8月, 2009 1 次提交
  13. 29 5月, 2009 1 次提交
  14. 26 5月, 2009 2 次提交
  15. 24 4月, 2009 3 次提交
    • P
      OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c files · f248076c
      Paul Walmsley 提交于
      Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
      to use in .init_irq functions to configure the system tick GPTIMER.
      Practical choices at this point are GPTIMER1 or GPTIMER12.  Both of
      these timers are in the WKUP powerdomain, and so are unaffected by
      chip power management.  GPTIMER1 can use sys_clk as a source, for
      applications where a high-resolution timer is more important than
      power management.  GPTIMER12 has the special property that it has the
      secure 32kHz oscillator as its source clock, which may be less prone
      to glitches than the off-chip 32kHz oscillator.  But on HS devices, it
      may not be available for Linux use.
      
      It appears that most boards are fine with GPTIMER1, but BeagleBoard
      should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
      in revisions B4 and below.  Modify board-omap3beagle.c to use GPTIMER12.
      
      This patch originally used a Kbuild config option to select the GPTIMER,
      but was changed to allow this to be specified in board-*.c files, per
      Tony's request.
      
      Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
      this patch - thanks Kalle.
      
      Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
      3430SDP.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Cc: Kalle Valo <kalle.valo@nokia.com>
      f248076c
    • K
      OMAP: dmtimer: enable all timers to be wakeup events · 219c5b98
      Kevin Hilman 提交于
      All GP timers on OMAP2/3 can generate wakeup events.  The wakeup status is
      cleared in the PRCM interrupt handler.
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      219c5b98
    • P
      OMAP3 GPTIMER: fix GPTIMER12 IRQ · 9198a406
      Paul Walmsley 提交于
      GPTIMER12 IRQ is at IRQ 95 on OMAP3, unlike OMAP2.  (ref: OMAP34xx
      Multimedia High Security (HS) Device Silicon Revision 3.0 Security
      Addendum Rev. B, SWPU119B)
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      9198a406
  16. 24 3月, 2009 1 次提交
  17. 11 12月, 2008 2 次提交
  18. 06 9月, 2008 2 次提交
  19. 07 8月, 2008 2 次提交
  20. 03 7月, 2008 2 次提交
    • R
      ARM: OMAP: DMTimer: Optimize by adding load and start · 3fddd09e
      Richard Woodruff 提交于
      This patch optimizes the timer load and start sequence.  By combining the
      load and start a needless posted wait can be removed from the system timer
      execution path.
      
      * Before patch register writes are taking up .078% @ 500MHz during idle.
      
       Address                 |total  |min  |max      |avr     |count|ratio%
       old\process\default_idle|7.369s |0.0us|999.902ms|14.477ms|509. |62.661%
       ld\Global\cpu_v7_do_idle|4.265s |0.0us|375.786ms|24.374ms|175. |36.270%
                      (UNKNOWN)|17.503ms|0.us|531.080us|5.119us|3419. |0.148%
       r\omap_dm_timer_set_load|8.135ms|0.0us|79.887us|15.065us|540.  |0.069% <--
       \vmlinux-old\Global\_end|2.023ms|0.0us|4.000us|0.560us|3613.   |0.017%
       -old\Global\__raw_readsw|1.962ms|0.0us|108.610us|9.167us|214.  |0.016%
       old\smc91x\smc_interrupt|1.353ms|0.0us|10.212us|2.348us|576.   |0.011%
       s/namei\__link_path_walk|1.161ms|0.0us|4.310us|0.762us|  1524. |0.009%
       \omap_dm_timer_write_reg|1.085ms|0.0us|126.150us|2.153us|504.  |0.009% <--
      
      * After patch timer functions do not show up in top listings for long captures.
      Signed-off-by: NRichard Woodruff <r-woodruff2@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      3fddd09e
    • R
      ARM: OMAP: DMTimer: Use posted mode · 0f0d0807
      Richard Woodruff 提交于
      This patch adds the use of write posting for the timer.  Previously, every
      write could lock the requestor for almost 3x32KHz cycles.  This patch only
      synchronizes before writes and reads instead of after them and it does
      it on per register basis.  Doing it this way there is some chance to hide
      some of the sync latency.  It also removes some needless reads when
      non-posted mode is there.  With out this fix the read/writes take almost
      2% CPU load @500MHz just waiting on tick timer registers.
      
      Also define new 34xx only registers.
      Signed-off-by: NRichard Woodruff <r-woodruff2@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      0f0d0807
  21. 06 3月, 2008 1 次提交
  22. 09 2月, 2008 2 次提交
  23. 22 8月, 2007 1 次提交
  24. 09 5月, 2007 1 次提交
  25. 05 5月, 2007 1 次提交
  26. 02 3月, 2007 2 次提交
    • M
      ARM: OMAP: dmtimer.c omap1 register fix · 53037f4c
      Matthew Percival 提交于
      When I went to use dmtimer7 it did not seem to work.  I noticed that
      the base addresses for dmtimers 7 and 8 were set wrong.  A simple patch
      to correct a small error.  Confirmed to fix the problem on an OSK.
      Signed-off-by: NMatthew Percival <matthew@capgo.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      53037f4c
    • D
      ARM: OMAP: Fix warnings in plat-omap · 2121880e
      Dirk Behme 提交于
      Fix warnings
      
      arch/arm/plat-omap/dmtimer.c: In function
      'omap_dm_timer_modify_idlect_mask':
      arch/arm/plat-omap/dmtimer.c:317: warning: no return
      statement in function returning non-void
      
      arch/arm/plat-omap/mailbox.c: In function 'omap_mbox_init':
      arch/arm/plat-omap/mailbox.c:231: warning: ignoring return
      value of 'class_device_create_file', declared with attribute
      warn_unused_result
      
      Signed-off-by: Dirk Behme <dirk.behme_at_gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      2121880e
  27. 25 9月, 2006 3 次提交