1. 26 3月, 2008 1 次提交
  2. 05 3月, 2008 1 次提交
  3. 03 2月, 2008 2 次提交
  4. 29 1月, 2008 3 次提交
    • A
      e100 endianness annotations · aaf918ba
      Al Viro 提交于
      Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      aaf918ba
    • D
      Fix e100 on systems that have cache incoherent DMA · 7734f6e6
      David Acker 提交于
      On the systems that have cache incoherent DMA, including ARM, there
      is a race condition between software allocating a new receive buffer
      and hardware writing into a buffer.  The two race on touching the last
      Receive Frame Descriptor (RFD).  It has its el-bit set and its next
      link equal to 0.  When hardware encounters this buffer it attempts to
      write data to it and then update Status Word bits and Actual Count in
      the RFD.  At the same time software may try to clear the el-bit and
      set the link address to a new buffer.
      
      Since the entire RFD is once cache-line, the two write operations can
      collide.  This can lead to the receive unit stalling or interpreting
      random memory as its receive area.
      
      The fix is to set the el-bit on and the size to 0 on the next to last
      buffer in the chain.  When the hardware encounters this buffer it stops
      and does not write to it at all.  The hardware issues an RNR interrupt
      with the receive unit in the No Resources state.  Software can write
      to the tail of the list because it knows hardware will stop on the
      previous descriptor that was marked as the end of list.
      
      Once it has a new next to last buffer prepared, it can clear the el-bit
      and set the size on the previous one.  The race on this buffer is safe
      since the link already points to a valid next buffer and the software
      can handle the race setting the size (assuming aligned 16 bit writes
      are atomic with respect to the DMA read). If the hardware sees the
      el-bit cleared without the size set, it will move on to the next buffer
      and skip this one.  If it sees the size set but the el-bit still set,
      it will complete that buffer and then RNR interrupt and wait.
      Signed-off-by: NDavid Acker <dacker@roinet.com>
      Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      7734f6e6
    • A
      netdev: use ARRAY_SIZE() instead of sizeof(array) / ETH_GSTRING_LEN · 4c3616cd
      Alejandro Martinez Ruiz 提交于
      Using ARRAY_SIZE() on arrays of the form array[][K] makes it unnecessary
      to know the value of K when checking its size.
      Signed-off-by: NAlejandro Martinez Ruiz <alex@flawedcode.org>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      4c3616cd
  5. 09 1月, 2008 2 次提交
  6. 15 12月, 2007 1 次提交
  7. 08 12月, 2007 1 次提交
  8. 20 10月, 2007 1 次提交
  9. 11 10月, 2007 7 次提交
  10. 01 8月, 2007 1 次提交
  11. 12 7月, 2007 1 次提交
    • A
      PCI: Change all drivers to use pci_device->revision · 44c10138
      Auke Kok 提交于
      Instead of all drivers reading pci config space to get the revision
      ID, they can now use the pci_device->revision member.
      
      This exposes some issues where drivers where reading a word or a dword
      for the revision number, and adding useless error-handling around the
      read. Some drivers even just read it for no purpose of all.
      
      In devices where the revision ID is being copied over and used in what
      appears to be the equivalent of hotpath, I have left the copy code
      and the cached copy as not to influence the driver's performance.
      
      Compile tested with make all{yes,mod}config on x86_64 and i386.
      Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
      Acked-by: NDave Jones <davej@redhat.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      44c10138
  12. 11 7月, 2007 1 次提交
  13. 13 6月, 2007 1 次提交
  14. 28 4月, 2007 3 次提交
    • J
      e100: Optionally use I/O mode only to access register space · 27345bb6
      Jesse Brandeburg 提交于
      It appears that some systems still like e100 better if it uses
      I/O access mode.  Setting the new parameter use_io=1 will cause
      all driver instances to use io mapping to access the register
      space on the e100 device.
      Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
      Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      27345bb6
    • J
      e100: allow bad MAC address when running with invalid eeprom csum · 948cd43f
      Jesse Brandeburg 提交于
      Seved Torstendahl <seved.torstendahl@netinsight.net> suggested to
      let the module parameter for invalid eeprom checksum control the valid
      mac address test.
      
      If this bypass happens we should print a different message,
      or at least one that is correct, maybe something like below
      Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
      Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      948cd43f
    • S
      [netdrvr e100] experiment with doing RX in a similar manner to eepro100 · d52df4a3
      Scott Feldman 提交于
      I was going to say that eepro100's speedo_rx_link() does the same DMA
      abuse as e100, but then I noticed one little detail: eepro100 sets  both
      EL (end of list) and S (suspend) bits in the RFD as it chains it  to the
      RFD list.  e100 was only setting the EL bit.  Hmmm, that's  interesting.
      That means that if HW reads a RFD with the S-bit set,  it'll process
      that RFD and then suspend the receive unit.  The  receive unit will
      resume when SW clears the S-bit.  There is no need  for SW to restart
      the receive unit.  Which means a lot of the receive  unit state tracking
      code in the driver goes away.
      
      So here's a patch against 2.6.14.  (Sorry for inlining it; the mailer
      I'm using now will mess with the word wrap).  I can't test this on
      XScale (unless someone has an e100 module for Gumstix :) .  It should
      be doing exactly what eepro100 does with RFDs.  I don't believe this
      change will introduce a performance hit because the S-bit and EL-bit  go
      hand-in-hand meaning if we're going to suspend because of the S- bit,
      we're on the last resource anyway, so we'll have to wait for SW  to
      replenish.
      (cherry picked from 29e79da9495261119e3b2e4e7c72507348e75976 commit)
      d52df4a3
  15. 26 4月, 2007 1 次提交
  16. 02 2月, 2007 1 次提交
  17. 30 1月, 2007 1 次提交
  18. 13 12月, 2006 1 次提交
  19. 30 11月, 2006 1 次提交
  20. 22 11月, 2006 1 次提交
  21. 25 10月, 2006 1 次提交
  22. 21 10月, 2006 1 次提交
  23. 05 10月, 2006 1 次提交
    • D
      IRQ: Maintain regs pointer globally rather than passing to IRQ handlers · 7d12e780
      David Howells 提交于
      Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
      of passing regs around manually through all ~1800 interrupt handlers in the
      Linux kernel.
      
      The regs pointer is used in few places, but it potentially costs both stack
      space and code to pass it around.  On the FRV arch, removing the regs parameter
      from all the genirq function results in a 20% speed up of the IRQ exit path
      (ie: from leaving timer_interrupt() to leaving do_IRQ()).
      
      Where appropriate, an arch may override the generic storage facility and do
      something different with the variable.  On FRV, for instance, the address is
      maintained in GR28 at all times inside the kernel as part of general exception
      handling.
      
      Having looked over the code, it appears that the parameter may be handed down
      through up to twenty or so layers of functions.  Consider a USB character
      device attached to a USB hub, attached to a USB controller that posts its
      interrupts through a cascaded auxiliary interrupt controller.  A character
      device driver may want to pass regs to the sysrq handler through the input
      layer which adds another few layers of parameter passing.
      
      I've build this code with allyesconfig for x86_64 and i386.  I've runtested the
      main part of the code on FRV and i386, though I can't test most of the drivers.
      I've also done partial conversion for powerpc and MIPS - these at least compile
      with minimal configurations.
      
      This will affect all archs.  Mostly the changes should be relatively easy.
      Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
      
      	struct pt_regs *old_regs = set_irq_regs(regs);
      
      And put the old one back at the end:
      
      	set_irq_regs(old_regs);
      
      Don't pass regs through to generic_handle_irq() or __do_IRQ().
      
      In timer_interrupt(), this sort of change will be necessary:
      
      	-	update_process_times(user_mode(regs));
      	-	profile_tick(CPU_PROFILING, regs);
      	+	update_process_times(user_mode(get_irq_regs()));
      	+	profile_tick(CPU_PROFILING);
      
      I'd like to move update_process_times()'s use of get_irq_regs() into itself,
      except that i386, alone of the archs, uses something other than user_mode().
      
      Some notes on the interrupt handling in the drivers:
      
       (*) input_dev() is now gone entirely.  The regs pointer is no longer stored in
           the input_dev struct.
      
       (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking.  It does
           something different depending on whether it's been supplied with a regs
           pointer or not.
      
       (*) Various IRQ handler function pointers have been moved to type
           irq_handler_t.
      Signed-Off-By: NDavid Howells <dhowells@redhat.com>
      (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
      7d12e780
  24. 28 9月, 2006 5 次提交