- 18 3月, 2015 14 次提交
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When logging that full mode switch is necessary, log which connector, encoder or crtc has caused it, so it is easier to figure out what is goind on by just looking at the log. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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We have similar macros for crtcs and encoders, and the pattern happens often enough to justify the macro. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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In the path were there is no state to duplicate, the allocated crtc state wouldn't have the crtc backpointer initialized. Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ville Syrjälä 提交于
The current minimum vco frequency leaves us with a gap in our supported frequencies at 233-243 MHz. Your typical 2560x1440@60 display wants a pixel clock of 241.5 MHz, which is just withing that gap. Reduce the allowed vco min frequency to 4.8GHz to reduce the gap to 233-240 MHz, and thus allow such displays to work. 4.8 GHz is actually the documented (at least in some docs) limit of the PLL, and we just picked 4.86 GHz originally because that was the lowest value produced by the PLL spreadsheet, which obviously didn't consider 2560x1440 displays. Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NVijay Purushothaman <vijay.a.purushothaman@linux.intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Paulo Zanoni 提交于
We need this for FBC, and possibly for PSR too. v2: Don't only flush: invalidate too (Daniel). Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Paulo Zanoni 提交于
We want to port FBC to the frontbuffer tracking infrastructure, but for that we need to know what caused the object invalidation so we can react accordingly: CPU mmaps need manual, GTT mmaps and flips don't need handling and ring rendering needs nukes. v2: - s/ORIGIN_RENDER/ORIGIN_CS/ (Daniel, Rodrigo) - Fix copy/pasted wrong documentation - Rebase v3: - Rebase v4: - Don't pass the operation to flushes (Daniel). Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
This reverts commit 3f678c96. We've been a bit too optimistic with this one here :( The trouble is that internally we're still using these plane update/disable hooks. Which was totally ok pre-atomic since the drm core did all the book-keeping updating and these just mostly updated hw state. But with atomic there's lots more going on, and it causes heaps of trouble with the load detect code. This one specifically cause a deadlock since both the load detect code and the nested plane atomic helper functions tried to grab the same locks. It only blows up because of the evil tricks though we play with the implicit ww acquire context. Applying this revert unearths the NULL deref on already freed framebuffer objects reported as a regression in 4.0 by various people. Fixing this will be fairly invasive, hence revert even for the 4.1-next queue. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul Bolle <pebolle@tiscali.nl> Acked-by: NMatt Roper <matthew.d.roper@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
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由 Damien Lespiau 提交于
This translation entry was updated after electrical validation by the hw team. The other entries are removed from existence as they aren't validated and because the sole use of a certain type of level shifter for SKL products is anticipated. v2: Remove all the other entries and force the use of the 800mv+2dB config (Sonika) Suggested-by: NSonika Jindal <sonika.jindal@intel.com> Cc: Sonika Jindal <sonika.jindal@intel.com> Signed-off-by: NDamien Lespiau <damien.lespiau@intel.com> Reviewed-by: NSonika Jindal <sonika.jindal@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Damien Lespiau 提交于
Implicit usage of local variables in macros isn't exactly the greatest thing in the world, especially when that variable is the drm device and we want to move towards a broader use of the i915 device structure. Let's make for_each_sprite() take dev_priv as its first argument then. Suggested-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NDamien Lespiau <damien.lespiau@intel.com> Reviewed-by: Chris Wilson <chris-wilson.co.uk> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Damien Lespiau 提交于
Implicit usage of local variables in macros isn't exactly the greatest thing in the world, especially when that variable is the drm device and we want to move towards a broader use of the i915 device structure. Let's make for_each_plane() take dev_priv as its first argument then. Suggested-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NDamien Lespiau <damien.lespiau@intel.com> Reviewed-by: Chris Wilson <chris-wilson.co.uk> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
With the two-step reset counter increments which braket the actual reset code and the subsequent wake-up we're guaranteeing that all the lockless waiters _will_ be woken up. And since we unconditionally bail out of waits with -EAGAIN (or -EIO) in that case there is not risk of lost interrupt enabling bits when the lockless wait code races against a gpu reset. Let's remove this FIXME as resolved then. Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Yannick Guerrini 提交于
Change 'mutliple' to 'multiple' Change 'mutlipler' to 'multiplier' Change 'Haswel' to 'Haswell' Signed-off-by: NYannick Guerrini <yguerrini@tomshardware.fr> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Matt Roper 提交于
plane->fb is a legacy pointer that not always be up-to-date (or updated early enough). Make sure the watermark code uses plane->state->fb so that we're always doing our calculations based on the correct framebuffers. This patch was generated by Coccinelle with the following semantic patch: @@ struct drm_plane *P; @@ - P->fb + P->state->fb v2: Rebase Signed-off-by: NMatt Roper <matthew.d.roper@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Matt Roper 提交于
The cursor size fields in intel_crtc just duplicate the data from cursor->state.crtc_{w,h} so we don't need them any more. Worse, their use in the watermark code actually introduces a subtle bug since they don't get updated to mirror the state values until the plane commit stage, which is *after* we've already used them to calculate new watermark values. This happens because we had to move watermark updates slightly earlier (outside vblank evasion) in commit commit 32b7eeec Author: Matt Roper <matthew.d.roper@intel.com> Date: Wed Dec 24 07:59:06 2014 -0800 drm/i915: Refactor work that can sleep out of commit (v7) Dropping the intel_crtc fields and just using the state values (which are properly updated by the time watermark updates happen) should solve the problem. Aside from the actual removal of the struct fields (which are formatted in a way that I couldn't figure out how to match in Coccinelle), the rest of this patch was generated via the following semantic patch: // Drop assignment @@ struct intel_crtc *C; struct drm_plane_state S; @@ ( - C->cursor_width = S.crtc_w; | - C->cursor_height = S.crtc_h; ) // Replace usage @@ struct intel_crtc *C; expression E; @@ ( - C->cursor_width + C->base.cursor->state->crtc_w | - C->cursor_height + C->base.cursor->state->crtc_h | - to_intel_crtc(E)->cursor_width + E->cursor->state->crtc_w | - to_intel_crtc(E)->cursor_height + E->cursor->state->crtc_h ) v2: Rebase Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Joe Konno <joe.konno@linux.intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89346Signed-off-by: NMatt Roper <matthew.d.roper@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 10 3月, 2015 2 次提交
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由 Tvrtko Ursulin 提交于
So no need to have code which never gets called in the driver. Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: dri-devel@lists.freedesktop.org Reviewed-by: NMatt Roper <matthew.d.roper@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ville Syrjälä 提交于
commit a8c6ecb3 Merge: 8dd0eb35 9eccca08 Author: Dave Airlie <airlied@redhat.com> Date: Mon Mar 9 19:58:30 2015 +1000 Merge tag 'v4.0-rc3' into drm-next managed to pick the wrong code to resolve the conflict and left us with a mutex_lock(struct_mutex) without the mutex_unlock(struct_mutex) leading to a deadlock. Fix the problem by recovering the correct code which doesn't need the lock. Cc: Dave Airlie <airlied@redhat.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 05 3月, 2015 2 次提交
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由 Tvrtko Ursulin 提交于
Use cases like rotation require these hooks to have some context so they know how to prepare and cleanup the frame buffer correctly. For i915 specifically, object backing pages need to be mapped differently for different rotation modes and the driver needs to know which mapping to instantiate and which to tear down when transitioning between them. v2: Made passed in states const. (Daniel Vetter) [airlied: add mdp5 and atmel fixups] Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Reviewed-by: NRob Clark <robdclark@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Thierry Reding 提交于
The current implementation is limited by the number of addresses that fit into an unsigned long. This causes problems on 32-bit Tegra where unsigned long is 32-bit but drm_mm is used to manage an IOVA space of 4 GiB. Given the 32-bit limitation, the range is limited to 4 GiB - 1 (or 4 GiB - 4 KiB for page granularity). This commit changes the start and size of the range to be an unsigned 64-bit integer, thus allowing much larger ranges to be supported. [airlied: fix i915 warnings and coloring callback] Signed-off-by: NThierry Reding <treding@nvidia.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NDave Airlie <airlied@redhat.com> fixupo
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- 04 3月, 2015 3 次提交
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由 Imre Deak 提交于
Bjørn reported that his machine hang during hibernation and eventually bisected the problem to the following commit: commit da2bc1b9 Author: Imre Deak <imre.deak@intel.com> Date: Thu Oct 23 19:23:26 2014 +0300 drm/i915: add poweroff_late handler The problem seems to be that after the kernel puts the device into D3 the BIOS still tries to access it, or otherwise assumes that it's in D0. This is clearly bogus, since ACPI mandates that devices are put into D3 by the OSPM if they are not wake-up sources. In the future we want to unify more of the driver's runtime and system suspend paths, for example by skipping all the system suspend/hibernation hooks if the device is runtime suspended already. Accordingly for all other platforms the goal is still to properly power down the device during hibernation. v2: - Another GEN4 Lenovo laptop had the same issue, while platforms from other vendors (including mobile and desktop, GEN4 and non-GEN4) seem to work fine. Based on this apply the workaround on all GEN4 Lenovo platforms. - add code comment about failing platforms (Ville) Reference: http://lists.freedesktop.org/archives/intel-gfx/2015-February/060633.htmlReported-and-bisected-by: NBjørn Mork <bjorn@mork.no> Cc: stable@vger.kernel.org # v3.19 Signed-off-by: NImre Deak <imre.deak@intel.com> Acked-by: NDaniel Vetter <daniel.vetter@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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由 Chris Wilson 提交于
When we takeover from the BIOS and install our interrupt handler, the BIOS may have left us a few surprises in the form of spontaneous interrupts. (This is especially likely on hardware like 965gm where display fifo underruns are continuous and the GMCH cannot filter that interrupt souce.) As we enable our IRQ early so that we can use it during hardware probing, our interrupt handler must be prepared to handle a few sources prior to being fully configured. As such, we need to add a simple is-ready check prior to dereferencing our KMS state for reporting underruns. Reported-by: NRob Clark <rclark@redhat.com> Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1193972Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org [Jani: dropped the extra !] Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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由 Daniel Vetter 提交于
This is a tricky story of the new atomic state handling and the legacy code fighting over each another. The bug at hand is an underrun of the framebuffer reference with subsequent hilarity caused by the load detect code. Which is peculiar since the the exact same code works fine as the implementation of the legacy setcrtc ioctl. Let's look at the ingredients: - Currently our code is a crazy mix of legacy modeset interfaces to set the parameters and half-baked atomic state tracking underneath. While this transition is going we're using the transitional plane helpers to update the atomic side (drm_plane_helper_disable/update and friends), i.e. plane->state->fb. Since the state structure owns the fb those functions take care of that themselves. The legacy state (specifically crtc->primary->fb) is still managed by the old code (and mostly by the drm core), with the fb reference counting done by callers (core drm for the ioctl or the i915 load detect code). The relevant commit is commit ea2c67bb Author: Matt Roper <matthew.d.roper@intel.com> Date: Tue Dec 23 10:41:52 2014 -0800 drm/i915: Move to atomic plane helpers (v9) - drm_plane_helper_disable has special code to handle multiple calls in a row - it checks plane->crtc == NULL and bails out. This is to match the proper atomic implementation which needs the crtc to get at the implied locking context atomic updates always need. See commit acf24a39 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Tue Jul 29 15:33:05 2014 +0200 drm/plane-helper: transitional atomic plane helpers - The universal plane code split out the implicit primary plane from the CRTC into it's own full-blown drm_plane object. As part of that the setcrtc ioctl (which updated both the crtc mode and primary plane) learned to set crtc->primary->crtc on modeset to make sure the plane->crtc assignments statate up to date in commit e13161af Author: Matt Roper <matthew.d.roper@intel.com> Date: Tue Apr 1 15:22:38 2014 -0700 drm: Add drm_crtc_init_with_planes() (v2) Unfortunately we've forgotten to update the load detect code. Which wasn't a problem since the load detect modeset is temporary and always undone before we drop the locks. - Finally there is a organically grown history (i.e. don't ask) around who sets the legacy plane->fb for the various driver entry points. Originally updating that was the drivers duty, but for almost all places we've moved that (plus updating the refcounts) into the core. Again the exception is the load detect code. Taking all together the following happens: - The load detect code doesn't set crtc->primary->crtc. This is only really an issue on crtcs never before used or when userspace explicitly disabled the primary plane. - The plane helper glue code short-circuits because of that and leaves a non-NULL fb behind in plane->state->fb and plane->fb. The state fb isn't a real problem (it's properly refcounted on its own), it's just the canary. - Load detect code drops the reference for that fb, but doesn't set plane->fb = NULL. This is ok since it's still living in that old world where drivers had to clear the pointer but the core/callers handled the refcounting. - On the next modeset the drm core notices plane->fb and takes care of refcounting it properly by doing another unref. This drops the refcount to zero, leaving state->plane now pointing at freed memory. - intel_plane_duplicate_state still assume it owns a reference to that very state->fb and bad things start to happen. Fix this all by applying the same duct-tape as for the legacy setcrtc ioctl code and set crtc->primary->crtc properly. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Paul Bolle <pebolle@tiscali.nl> Cc: Rob Clark <robdclark@gmail.com> Cc: Paulo Zanoni <przanoni@gmail.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Matt Roper <matthew.d.roper@intel.com> Reported-and-tested-by: NLinus Torvalds <torvalds@linux-foundation.org> Reported-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 28 2月, 2015 11 次提交
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由 Daniel Vetter 提交于
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Chris Wilson 提交于
For an object right on the boundary of mappable space, as the fenceable size is stricly greater than the actual size, its fence region may extend out of mappable space. Note that only pnv/g33 has fence_size > obj.size and an unmappable range in the gtt, and there alignment constraints prevent bad things from happening. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> [danvet: Clarify why this shouldn't change anything as per the discussion on intel-gfx.] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Tvrtko Ursulin 提交于
By this patch all underlying bits have been implemented and this patch actually enables the feature. v2: Validate passed in fb modifiers to reject garbage. (Daniel Vetter) v3: Rearrange validation checks per code review comments. (Daniel Vetter) Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v1) Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Tvrtko Ursulin 提交于
Display watermarks need different programming for different tiling modes. Set the relevant flag so this happens during the plane commit and add relevant data into a structure made available to the watermark computation code. v2: Pass in tiling info to sprite plane updates as well. v3: Rebased for plane handling changes. v4: Handle fb == NULL when plane is disabled. v5: Refactored for addfb2 interface. v6: Refactored for fb modifier changes. v7: Updated for atomic commit by only updating watermarks when tiling changes. v8: BSpec watermark calculation updates. v9: Restrict scope of y_tile_minimum variable. (Damien Lespiau) v10: Get fb from plane state otherwise we are working on old state. Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Acked-by: NMatt Roper <matthew.d.roper@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v9) Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Tvrtko Ursulin 提交于
Recent BSpect updates have changed the watermark calculation to avoid display flickering in some cases. v2: Fix check against DDB allocation and tidy the code a bit. (Damien Lespiau) Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Damien Lespiau 提交于
v2: Rebased for addfb2 interface and consolidated a bit. (Tvrtko Ursulin) v3: Rebased for fb modifier changes. (Tvrtko Ursulin) v4: Use intel_fb_stride_alignment instead of open coding. (Damien Lespiau) Signed-off-by: NDamien Lespiau <damien.lespiau@intel.com> Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Damien Lespiau 提交于
1Mb! v2: Rebased for addfb2 interface. (Tvrtko Ursulin) v3: Rebased for fb modifier changes. (Tvrtko Ursulin) Signed-off-by: NDamien Lespiau <damien.lespiau@intel.com> Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Damien Lespiau 提交于
We now need the bpp of the fb as Yf tiling has different tile widths depending on it. v2: Rebased for the new addfb2 interface. (Tvrtko Ursulin) v3: Rebased for fb modifier changes. (Tvrtko Ursulin) v4: Added missing case and 128-bit pixel warning. (Damien Lespiau) Signed-off-by: NDamien Lespiau <damien.lespiau@intel.com> Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v3) Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Damien Lespiau 提交于
Skylake is able to scannout those tiling formats. We need to allow them in the ADDFB ioctl and tell the harware about it. v2: Rebased for addfb2 interface. (Tvrtko Ursulin) v3: Rebased for fb modifier changes. (Tvrtko Ursulin) v4: Don't allow Y tiled fbs just yet. (Tvrtko Ursulin) v5: Check for stride alignment and max pitch. (Tvrtko Ursulin) v6: Simplify maximum pitch check. (Ville Syrjälä) v7: Drop the gen9 check since requirements are no different. (Ville Syrjälä) v8: Gen2 has different X tiling stride. (Ville Syrjälä) Signed-off-by: NDamien Lespiau <damien.lespiau@intel.com> Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v7) Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
Mostly just checks in i915-private modeset ioctls. Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
Lots of lines to remove! Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> [danvet: Fixup makefile.] Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 27 2月, 2015 6 次提交
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由 Daniel Vetter 提交于
Hooray! Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
Again, good riddance to UMS! Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
UMS is dead, yay! Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
UMS is gone, this is dead code. Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Dan Carpenter 提交于
This printk leads to the following Smatch warning: drivers/gpu/drm/i915/i915_gem_gtt.c:336 alloc_pt_range() error: '%pa' expects argument of type 'phys_addr_t*', argument 5 has type 'struct i915_page_table_entry*' It looks like a simple typo to me where "%p" was intended instead of "%pa". Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Ville Syrjälä 提交于
On VLV/CHV the media well rc6 residency gets reported separately from the render well, so add another file to sysfs so that we can report the residency to the user. Testcase: igt/pm_rc6_residency --run-subtest media-rc6-accuracy Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NDeepak S <deepak.s@linux.intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 26 2月, 2015 2 次提交
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由 Michel Thierry 提交于
The patch "drm/i915: Plumb drm_device through page tables operations" added an extra parameter, but it didn't update the function description. Also remove unnecessary blank line added by the same patch. Found by kbuild test robot. Signed-off-by: NMichel Thierry <michel.thierry@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Akash Goel 提交于
The frequency values(Rp0, Rp1, Rpn) reported by RP_STATE_CAP register are stored, initially by the Driver, inside the dev_priv->rps structure. Since these values are expected to remain same throughout, there is no real need to read this register, on dynamic basis, from certain debugfs/sysfs functions and the values can be instead retrieved from the dev_priv->rps structure when needed. For the i915_frequency_info debugfs interface, the frequency values from the RP_STATE_CAP register only should be used, to indicate the actual Hw state, since it is principally used for the debugging purpose. v2: Reverted the changes in i915_frequency_info function, to continue report back the frequency values, as per the actual Hw state (Chris) Signed-off-by: NAkash Goel <akash.goel@intel.com> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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