1. 15 4月, 2015 1 次提交
    • R
      ACPICA: Store GPE register enable masks upfront · 0ee0d349
      Rafael J. Wysocki 提交于
      It is reported that ACPI interrupts do not work any more on
      Dell Latitude D600 after commit c50f13c6 (ACPICA: Save
      current masks of enabled GPEs after enable register writes).
      The problem turns out to be related to the fact that the
      enable_mask and enable_for_run GPE bit masks are not in
      sync (in the absence of any system suspend/resume events)
      for at least one GPE register on that machine.
      
      Address this problem by writing the enable_for_run mask into
      enable_mask as soon as enable_for_run is updated instead of
      doing that only after the subsequent register write has
      succeeded.  For consistency, update acpi_hw_gpe_enable_write()
      to store the bit mask to be written into the GPE register
      in enable_mask unconditionally before the write.
      
      Since the ACPI_GPE_SAVE_MASK flag is not necessary any more after
      that, drop it along with the symbols depending on it.
      Reported-and-tested-by: NJim Bos <jim876@xs4all.nl>
      Fixes: c50f13c6 (ACPICA: Save current masks of enabled GPEs after enable register writes)
      Cc: 3.19+ <stable@vger.kernel.org> # 3.19+
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      0ee0d349
  2. 14 4月, 2015 31 次提交
  3. 13 4月, 2015 3 次提交
  4. 12 4月, 2015 5 次提交