Hack up the Orion port to distinguish between virtual and physical
addresses of register windows.  This will allow moving virtual
mappings higher up in the address space, to free up more kernel
virtual address space.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

This patch adds instantiation for the sata_mv driver, enabling the
integrated SATA controller.
Signed-off-by: NSaeed Bishara <saeed@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

The Orion I2C controller is the same one used in the Discovery
family (MV643XX). This patch include the common platform_device
stuff according to the existing i2c_mv64xxx.c conventions.
Signed-off-by: NHerbert Valerio Riedel <hvr@gnu.org>
Signed-off-by: NTzachi Perelstein <tzachi@marvell.com>

add MV88F5181 support bits required by D-link DNS-323 patch
Signed-off-by: NHerbert Valerio Riedel <hvr@gnu.org>
Acked-by: NTzachi Perelstein <tzachi@marvell.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Orion Ethernet port is the same port used in the Discovery
family (MV643XX). This patch include the common platform_device
stuff according to the existing mv643xx_eth conventions.
Signed-off-by: NTzachi Perelstein <tzachi@marvell.com>
Reviewed-by: NLennert Buytenhek <buytenh@marvell.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NTzachi Perelstein <tzachi@marvell.com>
Reviewed-by: NNicolas Pitre <nico@marvell.com>
Reviewed-by: NLennert Buytenhek <buytenh@marvell.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Orion has fully programable address map. There's a separate address
map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB,
Gigabit Ethernet, DMA/XOR engines, etc.
Signed-off-by: NTzachi Perelstein <tzachi@marvell.com>
Reviewed-by: NNicolas Pitre <nico@marvell.com>
Reviewed-by: NLennert Buytenhek <buytenh@marvell.com>

The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.

This contains the basic structure and architecture register definitions.
Signed-off-by: NTzachi Perelstein <tzachi@marvell.com>
Reviewed-by: NNicolas Pitre <nico@marvell.com>
Reviewed-by: NLennert Buytenhek <buytenh@marvell.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>