1. 24 7月, 2018 11 次提交
    • L
      PCI: pciehp: Handle events synchronously · 0e94916e
      Lukas Wunner 提交于
      Up until now, pciehp's IRQ handler schedules a work item for each event,
      which in turn schedules a work item to enable or disable the slot.  This
      double indirection was necessary because sleeping wasn't allowed in the
      IRQ handler.
      
      However it is now that pciehp has been converted to threaded IRQ handling
      and polling, so handle events synchronously in pciehp_ist() and remove
      the work item infrastructure (with the exception of work items to handle
      a button press after the 5 second delay).
      
      For link or presence change events, move the register read to determine
      the current link or presence state behind acquisition of the slot lock
      to prevent it from becoming stale while the lock is contended.
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      0e94916e
    • L
      PCI: pciehp: Stop blinking on slot enable failure · b0ccd9dd
      Lukas Wunner 提交于
      If the attention button is pressed to power on the slot AND the user
      powers on the slot via sysfs before 5 seconds have elapsed AND powering
      on the slot fails because either the slot is unoccupied OR the latch is
      open, we neglect turning off the green LED so it keeps on blinking.
      
      That's because the error path of pciehp_sysfs_enable_slot() doesn't call
      pciehp_green_led_off(), unlike pciehp_power_thread() which does.
      The bug has been present since 2004 when the driver was introduced.
      
      Fix by deduplicating common code in pciehp_sysfs_enable_slot() and
      pciehp_power_thread() into a wrapper function pciehp_enable_slot() and
      renaming the existing function to __pciehp_enable_slot().  Same for
      pciehp_disable_slot().  This will also simplify the upcoming rework of
      pciehp's event handling.
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      b0ccd9dd
    • L
      PCI: pciehp: Convert to threaded polling · ec07a447
      Lukas Wunner 提交于
      We've just converted pciehp to threaded IRQ handling, but still cannot
      sleep in pciehp_ist() because the function is also called in poll mode,
      which runs in softirq context (from a timer).
      
      Convert poll mode to a kthread so that pciehp_ist() always runs in task
      context.
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      ec07a447
    • L
      PCI: pciehp: Convert to threaded IRQ · 7b4ce26b
      Lukas Wunner 提交于
      pciehp's IRQ handler queues up a work item for each event signaled by
      the hardware.  A more modern alternative is to let a long running
      kthread service the events.  The IRQ handler's sole job is then to check
      whether the IRQ originated from the device in question, acknowledge its
      receipt to the hardware to quiesce the interrupt and wake up the kthread.
      
      One benefit is reduced latency to handle the IRQ, which is a necessity
      for realtime environments.  Another benefit is that we can make pciehp
      simpler and more robust by handling events synchronously in process
      context, rather than asynchronously by queueing up work items.  pciehp's
      usage of work items is a historic artifact, it predates the introduction
      of threaded IRQ handlers by two years.  (The former was introduced in
      2007 with commit 5d386e1a ("pciehp: Event handling rework"), the
      latter in 2009 with commit 3aa551c9 ("genirq: add threaded interrupt
      handler support").)
      
      Convert pciehp to threaded IRQ handling by retrieving the pending events
      in pciehp_isr(), saving them for later consumption by the thread handler
      pciehp_ist() and clearing them in the Slot Status register.
      
      By clearing the Slot Status (and thereby acknowledging the events) in
      pciehp_isr(), we can avoid requesting the IRQ with IRQF_ONESHOT, which
      would have the unpleasant side effect of starving devices sharing the
      IRQ until pciehp_ist() has finished.
      
      pciehp_isr() does not count how many times each event occurred, but
      merely records the fact *that* an event occurred.  If the same event
      occurs a second time before pciehp_ist() is woken, that second event
      will not be recorded separately, which is problematic according to
      commit fad214b0 ("PCI: pciehp: Process all hotplug events before
      looking for new ones") because we may miss removal of a card in-between
      two back-to-back insertions.  We're about to make pciehp_ist() resilient
      to missed events.  The present commit regresses the driver's behavior
      temporarily in order to separate the changes into reviewable chunks.
      This doesn't affect regular slow-motion hotplug, only plug-unplug-plug
      operations that happen in a timespan shorter than wakeup of the IRQ
      thread.
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Mayurkumar Patel <mayurkumar.patel@intel.com>
      Cc: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      7b4ce26b
    • L
      PCI: pciehp: Document struct slot and struct controller · 4aed1cd6
      Lukas Wunner 提交于
      Document the driver's data structures to lower the barrier to entry for
      contributors.
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      4aed1cd6
    • L
      PCI: pciehp: Declare pciehp_unconfigure_device() void · 1d2e2673
      Lukas Wunner 提交于
      Since commit 0f4bd801 ("PCI: hotplug: Drop checking of PCI_BRIDGE_
      CONTROL in *_unconfigure_device()"), pciehp_unconfigure_device() can no
      longer fail, so declare it and its sole caller remove_board() void, in
      keeping with the usual kernel pattern that enablement can fail, but
      disablement cannot.  No functional change intended.
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
      1d2e2673
    • L
      PCI: pciehp: Drop unnecessary NULL pointer check · 6641311d
      Lukas Wunner 提交于
      pciehp_disable_slot() checks if the ctrl attribute of the slot is NULL
      and bails out if so.  However the function is not called prior to the
      attribute being set in pcie_init_slot(), and pcie_init_slot() is not
      called if ctrl is NULL.  So the check is unnecessary.  Drop it.
      
      It has been present ever since the driver was introduced in 2004, but it
      was already unnecessary back then:
      https://git.kernel.org/tglx/history/c/c16b4b14d980Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      6641311d
    • L
      PCI: pciehp: Fix unprotected list iteration in IRQ handler · 1204e35b
      Lukas Wunner 提交于
      Commit b440bde7 ("PCI: Add pci_ignore_hotplug() to ignore hotplug
      events for a device") iterates over the devices on a hotplug port's
      subordinate bus in pciehp's IRQ handler without acquiring pci_bus_sem.
      It is thus possible for a user to cause a crash by concurrently
      manipulating the device list, e.g. by disabling slot power via sysfs
      on a different CPU or by initiating a remove/rescan via sysfs.
      
      This can't be fixed by acquiring pci_bus_sem because it may sleep.
      The simplest fix is to avoid the list iteration altogether and just
      check the ignore_hotplug flag on the port itself.  This works because
      pci_ignore_hotplug() sets the flag both on the device as well as on its
      parent bridge.
      
      We do lose the ability to print the name of the device blocking hotplug
      in the debug message, but that's probably bearable.
      
      Fixes: b440bde7 ("PCI: Add pci_ignore_hotplug() to ignore hotplug events for a device")
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: stable@vger.kernel.org
      1204e35b
    • L
      PCI: pciehp: Fix use-after-free on unplug · 281e878e
      Lukas Wunner 提交于
      When pciehp is unbound (e.g. on unplug of a Thunderbolt device), the
      hotplug_slot struct is deregistered and thus freed before freeing the
      IRQ.  The IRQ handler and the work items it schedules print the slot
      name referenced from the freed structure in various informational and
      debug log messages, each time resulting in a quadruple dereference of
      freed pointers (hotplug_slot -> pci_slot -> kobject -> name).
      
      At best the slot name is logged as "(null)", at worst kernel memory is
      exposed in logs or the driver crashes:
      
        pciehp 0000:10:00.0:pcie204: Slot((null)): Card not present
      
      An attacker may provoke the bug by unplugging multiple devices on a
      Thunderbolt daisy chain at once.  Unplugging can also be simulated by
      powering down slots via sysfs.  The bug is particularly easy to trigger
      in poll mode.
      
      It has been present since the driver's introduction in 2004:
      https://git.kernel.org/tglx/history/c/c16b4b14d980
      
      Fix by rearranging teardown such that the IRQ is freed first.  Run the
      work items queued by the IRQ handler to completion before freeing the
      hotplug_slot struct by draining the work queue from the ->release_slot
      callback which is invoked by pci_hp_deregister().
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: stable@vger.kernel.org # v2.6.4
      281e878e
    • L
      PCI: hotplug: Don't leak pci_slot on registration failure · 4ce64358
      Lukas Wunner 提交于
      If addition of sysfs files fails on registration of a hotplug slot, the
      struct pci_slot as well as the entry in the slot_list is leaked.  The
      issue has been present since the hotplug core was introduced in 2002:
      https://git.kernel.org/tglx/history/c/a8a2069f432c
      
      Perhaps the idea was that even though sysfs addition fails, the slot
      should still be usable.  But that's not how drivers use the interface,
      they abort probe if a non-zero value is returned.
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: stable@vger.kernel.org # v2.4.15+
      Cc: Greg Kroah-Hartman <greg@kroah.com>
      4ce64358
    • L
      PCI: hotplug: Delete skeleton driver · b4efce5c
      Lukas Wunner 提交于
      Ten years ago, commit 58319b80 ("PCI: Hotplug core: remove 'name'")
      dropped the name element from struct hotplug_slot but neglected to update
      the skeleton driver.
      
      That same year, commit f46753c5 ("PCI: introduce pci_slot") raised the
      number of arguments to pci_hp_register() from one to four.
      
      Fourteen years ago, historic commit 7ab60fc1b8e7 ("PCI Hotplug skeleton:
      final cleanups") removed all usages of the retval variable from
      pcihp_skel_init() but not the variable itself, provoking a compiler
      warning: https://git.kernel.org/tglx/history/c/7ab60fc1b8e7
      
      It seems fair to assume the driver hasn't been used as a template for a new
      driver in a while.  Per Bjorn's and Christoph's preference, delete it.
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: Christoph Hellwig <hch@lst.de>
      b4efce5c
  2. 27 6月, 2018 1 次提交
    • B
      PCI: shpchp: Separate existence of SHPC and permission to use it · b03799b0
      Bjorn Helgaas 提交于
      The shpchp driver registers for all PCI bridge devices.  Its probe method
      should fail if either (1) the bridge doesn't have an SHPC or (2) the OS
      isn't allowed to use it (the platform firmware may be operating the SHPC
      itself).
      
      Separate these two tests into:
      
        - A new shpc_capable() that looks for the SHPC hardware and is applicable
          on all systems (ACPI and non-ACPI), and
      
        - A simplified acpi_get_hp_hw_control_from_firmware() that we call only
          when we already know an SHPC exists and there may be ACPI methods to
          either request permission to use it (_OSC) or transfer control to the
          OS (OSHP).
      
      acpi_get_hp_hw_control_from_firmware() is implemented when CONFIG_ACPI=y,
      but does nothing if the current platform doesn't support ACPI.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      b03799b0
  3. 26 6月, 2018 1 次提交
  4. 05 6月, 2018 5 次提交
  5. 02 6月, 2018 5 次提交
  6. 24 5月, 2018 2 次提交
  7. 18 5月, 2018 1 次提交
  8. 08 5月, 2018 1 次提交
    • B
      PCI: pciehp: Add quirk for Command Completed errata · d22b3621
      Bjorn Helgaas 提交于
      Several PCIe hotplug controllers have errata that mean they do not set the
      Command Completed bit unless writes to the Slot Command register change
      "Control" bits.  Command Completed is never set for writes that only change
      software notification "Enable" bits.  This results in timeouts like this:
      
        pciehp 0000:00:1c.0:pcie004: Timeout on hotplug command 0x1038 (issued 65284 msec ago)
      
      When this erratum is present, avoid these timeouts by marking commands
      "completed" immediately unless they change the "Control" bits.
      
      Here's the text of the Intel erratum CF118.  We assume this applies to all
      Intel parts:
      
        CF118        PCIe Slot Status Register Command Completed bit not always
                     updated on any configuration write to the Slot Control
                     Register
      
        Problem:     For PCIe root ports (devices 0 - 10) supporting hot-plug,
                     the Slot Status Register (offset AAh) Command Completed
                     (bit[4]) status is updated under the following condition:
                     IOH will set Command Completed bit after delivering the new
                     commands written in the Slot Controller register (offset
                     A8h) to VPP. The IOH detects new commands written in Slot
                     Control register by checking the change of value for Power
                     Controller Control (bit[10]), Power Indicator Control
                     (bits[9:8]), Attention Indicator Control (bits[7:6]), or
                     Electromechanical Interlock Control (bit[11]) fields. Any
                     other configuration writes to the Slot Control register
                     without changing the values of these fields will not cause
                     Command Completed bit to be set.
      
                     The PCIe Base Specification Revision 2.0 or later describes
                     the “Slot Control Register” in section 7.8.10, as follows
                     (Reference section 7.8.10, Slot Control Register, Offset
                     18h). In hot-plug capable Downstream Ports, a write to the
                     Slot Control register must cause a hot-plug command to be
                     generated (see Section 6.7.3.2 for details on hot-plug
                     commands). A write to the Slot Control register in a
                     Downstream Port that is not hotplug capable must not cause a
                     hot-plug command to be executed.
      
                     The PCIe Spec intended that every write to the Slot Control
                     Register is a command and expected a command complete status
                     to abstract the VPP implementation specific nuances from the
                     OS software. IOH PCIe Slot Control Register implementation
                     is not fully conforming to the PCIe Specification in this
                     respect.
      
        Implication: Software checking on the Command Completed status after
                     writing to the Slot Control register may time out.
      
        Workaround:  Software can read the Slot Control register and compare the
                     existing and new values to determine if it should check the
                     Command Completed status after writing to the Slot Control
                     register.
      
      Per Sinan, the Qualcomm QDF2400 controller also does not set the Command
      Completed bit unless writes to the Slot Command register change "Control"
      bits.
      
      Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html
      Link: https://lkml.kernel.org/r/8770820b-85a0-172b-7230-3a44524e6c9f@molgen.mpg.de
      Reported-by: Paul Menzel <pmenzel+linux-pci@molgen.mpg.de>	# Lenovo X60
      Tested-by: Paul Menzel <pmenzel+linux-pci@molgen.mpg.de>	# Lenovo X60
      Signed-off-by: Sinan Kaya <okaya@codeaurora.org>		# Qcom quirk
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      d22b3621
  9. 21 4月, 2018 1 次提交
  10. 24 3月, 2018 1 次提交
    • M
      ACPI / hotplug / PCI: Check presence of slot itself in get_slot_status() · 13d3047c
      Mika Westerberg 提交于
      Mike Lothian reported that plugging in a USB-C device does not work
      properly in his Dell Alienware system.  This system has an Intel Alpine
      Ridge Thunderbolt controller providing USB-C functionality.  In these
      systems the USB controller (xHCI) is hotplugged whenever a device is
      connected to the port using ACPI-based hotplug.
      
      The ACPI description of the root port in question is as follows:
      
        Device (RP01)
        {
            Name (_ADR, 0x001C0000)
      
            Device (PXSX)
            {
                Name (_ADR, 0x02)
      
                Method (_RMV, 0, NotSerialized)
                {
                    // ...
                }
            }
      
      Here _ADR 0x02 means device 0, function 2 on the bus under root port (RP01)
      but that seems to be incorrect because device 0 is the upstream port of the
      Alpine Ridge PCIe switch and it has no functions other than 0 (the bridge
      itself).  When we get ACPI Notify() to the root port resulting from
      connecting a USB-C device, Linux tries to read PCI_VENDOR_ID from device 0,
      function 2 which of course always returns 0xffffffff because there is no
      such function and we never find the device.
      
      In Windows this works fine.
      
      Now, since we get ACPI Notify() to the root port and not to the PXSX device
      we should actually start our scan from there as well and not from the
      non-existent PXSX device.  Fix this by checking presence of the slot itself
      (function 0) if we fail to do that otherwise.
      
      While there use pci_bus_read_dev_vendor_id() in get_slot_status(), which is
      the recommended way to read Device and Vendor IDs of devices on PCI buses.
      
      Link: https://bugzilla.kernel.org/show_bug.cgi?id=198557Reported-by: NMike Lothian <mike@fireburn.co.uk>
      Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: stable@vger.kernel.org
      13d3047c
  11. 13 3月, 2018 1 次提交
  12. 10 3月, 2018 1 次提交
  13. 01 3月, 2018 1 次提交
  14. 23 2月, 2018 1 次提交
  15. 04 2月, 2018 1 次提交
  16. 30 1月, 2018 1 次提交
  17. 29 1月, 2018 2 次提交
  18. 27 1月, 2018 1 次提交
  19. 24 1月, 2018 1 次提交
    • L
      PCI: pciehp: Assume NoCompl+ for Thunderbolt ports · 493fb50e
      Lukas Wunner 提交于
      Certain Thunderbolt 1 controllers claim to support Command Completed events
      (value of 0b in the No Command Completed Support field of the Slot
      Capabilities register) but in reality they neither set the Command
      Completed bit in the Slot Status register nor signal a Command Completed
      interrupt:
      
        8086:1513  CV82524  [Light Ridge 4C  2010]
        8086:151a  DSL2310  [Eagle Ridge 2C  2011]
        8086:151b  CVL2510  [Light Peak 2C   2010]
        8086:1547  DSL3510  [Cactus Ridge 4C 2012]
        8086:1548  DSL3310  [Cactus Ridge 2C 2012]
        8086:1549  DSL2210  [Port Ridge 1C   2011]
      
      All known newer chips (Redwood Ridge and onwards) set No Command Completed
      Support, indicating that they do not support Command Completed events.
      
      The user-visible impact is that after unplugging such a device, 2 seconds
      elapse until pciehp is unbound.  That's because on ->remove,
      pcie_write_cmd() is called via pcie_disable_notification() and every call
      to pcie_write_cmd() takes 2 seconds (1 second for each invocation of
      pcie_wait_cmd()):
      
        [  337.942727] pciehp 0000:0a:00.0:pcie204: Timeout on hotplug command 0x1038 (issued 21176 msec ago)
        [  340.014735] pciehp 0000:0a:00.0:pcie204: Timeout on hotplug command 0x0000 (issued 2072 msec ago)
      
      That by itself has always been unpleasant, but the situation has become
      worse with commit cc27b735 ("PCI/portdrv: Turn off PCIe services during
      shutdown"):  Now pciehp is unbound on ->shutdown.  Because Thunderbolt
      controllers typically have 4 hotplug ports, every reboot and shutdown is
      now delayed by 8 seconds, plus another 2 seconds for every attached
      Thunderbolt 1 device.
      
      Thunderbolt hotplug slots are not physical slots that one inserts cards
      into, but rather logical hotplug slots implemented in silicon.  Devices
      appear beyond those logical slots once a PCI tunnel is established on top
      of the Thunderbolt Converged I/O switch.  One would expect commands written
      to the Slot Control register to be executed immediately by the silicon, so
      for simplicity we always assume NoCompl+ for Thunderbolt ports.
      
      Fixes: cc27b735 ("PCI/portdrv: Turn off PCIe services during shutdown")
      Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Cc: stable@vger.kernel.org	# v4.12+
      Cc: Sinan Kaya <okaya@codeaurora.org>
      Cc: Yehezkel Bernat <yehezkel.bernat@intel.com>
      Cc: Michael Jamet <michael.jamet@intel.com>
      Cc: Andreas Noever <andreas.noever@gmail.com>
      493fb50e
  20. 21 1月, 2018 1 次提交
    • M
      hotplug/drc-info: Add code to search ibm,drc-info property · 2fcf3ae5
      Michael Bringmann 提交于
      rpadlpar_core.c: Provide parallel routines to search the older device-
      tree properties ("ibm,drc-indexes", "ibm,drc-names", "ibm,drc-types"
      and "ibm,drc-power-domains"), or the new property "ibm,drc-info".
      
      The interface to examine the DRC information is changed from a "get"
      function that returns values for local verification elsewhere, to a
      "check" function that validates the 'name' and/or 'type' of a device
      node.  This update hides the format of the underlying device-tree
      properties, and concentrates the value checks into a single function
      without requiring the user to verify whether a search was successful.
      Signed-off-by: NMichael Bringmann <mwb@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      2fcf3ae5