1. 30 9月, 2014 2 次提交
  2. 25 9月, 2014 1 次提交
    • W
      powerpc/eeh: Fix kernel crash when passing through VF · 2a58222f
      Wei Yang 提交于
      When doing vfio passthrough a VF, the kernel will crash with following
      message:
      
      [  442.656459] Unable to handle kernel paging request for data at address 0x00000060
      [  442.656593] Faulting instruction address: 0xc000000000038b88
      [  442.656706] Oops: Kernel access of bad area, sig: 11 [#1]
      [  442.656798] SMP NR_CPUS=1024 NUMA PowerNV
      [  442.656890] Modules linked in: vfio_pci mlx4_core nf_conntrack_netbios_ns nf_conntrack_broadcast ipt_MASQUERADE ip6t_REJECT xt_conntrack bnep bluetooth rfkill ebtable_nat ebtable_broute bridge stp llc ebtable_filter ebtables ip6table_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_nat_ipv6 ip6table_mangle ip6table_security ip6table_raw ip6table_filter ip6_tables iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_mangle iptable_security iptable_raw tg3 nfsd be2net nfs_acl ses lockd ptp enclosure pps_core kvm_hv kvm_pr shpchp binfmt_misc kvm sunrpc uinput lpfc scsi_transport_fc ipr scsi_tgt [last unloaded: mlx4_core]
      [  442.658152] CPU: 40 PID: 14948 Comm: qemu-system-ppc Not tainted 3.10.42yw-pkvm+ #37
      [  442.658219] task: c000000f7e2a9a00 ti: c000000f6dc3c000 task.ti: c000000f6dc3c000
      [  442.658287] NIP: c000000000038b88 LR: c0000000004435a8 CTR: c000000000455bc0
      [  442.658352] REGS: c000000f6dc3f580 TRAP: 0300   Not tainted  (3.10.42yw-pkvm+)
      [  442.658419] MSR: 9000000000009032 <SF,HV,EE,ME,IR,DR,RI>  CR: 28004882  XER: 20000000
      [  442.658577] CFAR: c00000000000908c DAR: 0000000000000060 DSISR: 40000000 SOFTE: 1
      GPR00: c0000000004435a8 c000000f6dc3f800 c0000000012b1c10 c00000000da24000
      GPR04: 0000000000000003 0000000000001004 00000000000015b3 000000000000ffff
      GPR08: c00000000127f5d8 0000000000000000 000000000000ffff 0000000000000000
      GPR12: c000000000068078 c00000000fdd6800 000001003c320c80 000001003c3607f0
      GPR16: 0000000000000001 00000000105480c8 000000001055aaa8 000001003c31ab18
      GPR20: 000001003c10fb40 000001003c360ae8 000000001063bcf0 000000001063bdb0
      GPR24: 000001003c15ed70 0000000010548f40 c000001fe5514c88 c000001fe5514cb0
      GPR28: c00000000da24000 0000000000000000 c00000000da24000 0000000000000003
      [  442.659471] NIP [c000000000038b88] .pcibios_set_pcie_reset_state+0x28/0x130
      [  442.659530] LR [c0000000004435a8] .pci_set_pcie_reset_state+0x28/0x40
      [  442.659585] Call Trace:
      [  442.659610] [c000000f6dc3f800] [00000000000719e0] 0x719e0 (unreliable)
      [  442.659677] [c000000f6dc3f880] [c0000000004435a8] .pci_set_pcie_reset_state+0x28/0x40
      [  442.659757] [c000000f6dc3f900] [c000000000455bf8] .reset_fundamental+0x38/0x80
      [  442.659835] [c000000f6dc3f980] [c0000000004562a8] .pci_dev_specific_reset+0xa8/0xf0
      [  442.659913] [c000000f6dc3fa00] [c0000000004448c4] .__pci_dev_reset+0x44/0x430
      [  442.659980] [c000000f6dc3fab0] [c000000000444d5c] .pci_reset_function+0x7c/0xc0
      [  442.660059] [c000000f6dc3fb30] [d00000001c141ab8] .vfio_pci_open+0xe8/0x2b0 [vfio_pci]
      [  442.660139] [c000000f6dc3fbd0] [c000000000586c30] .vfio_group_fops_unl_ioctl+0x3a0/0x630
      [  442.660219] [c000000f6dc3fc90] [c000000000255fbc] .do_vfs_ioctl+0x4ec/0x7c0
      [  442.660286] [c000000f6dc3fd80] [c000000000256364] .SyS_ioctl+0xd4/0xf0
      [  442.660354] [c000000f6dc3fe30] [c000000000009e54] syscall_exit+0x0/0x98
      [  442.660420] Instruction dump:
      [  442.660454] 4bfffce9 4bfffee4 7c0802a6 fbc1fff0 fbe1fff8 f8010010 f821ff81 7c7e1b78
      [  442.660566] 7c9f2378 60000000 60000000 e93e02c8 <e8690060> 2fa30000 41de00c4 2b9f0002
      [  442.660679] ---[ end trace a64ac9546bcf0328 ]---
      [  442.660724]
      
      The reason is current VF is not EEH enabled.
      
      This patch introduces a macro to convert eeh_dev to eeh_pe. By doing so, it
      will prevent converting with NULL pointer.
      Signed-off-by: NWei Yang <weiyang@linux.vnet.ibm.com>
      Acked-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      CC: Michael Ellerman <mpe@ellerman.id.au>
      
      V3 -> V4:
         1. move the macro definition from include/linux/pci.h to
            arch/powerpc/include/asm/eeh.h
      
      V2 -> V3:
         1. rebased on 3.17-rc4
         2. introduce a macro
         3. use this macro in several other places
      
      V1 -> V2:
         1. code style and patch subject adjustment
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      2a58222f
  3. 05 8月, 2014 5 次提交
  4. 11 6月, 2014 1 次提交
    • G
      powerpc/eeh: Dump PE location code · 357b2f3d
      Gavin Shan 提交于
      As Ben suggested, it's meaningful to dump PE's location code
      for site engineers when hitting EEH errors. The patch introduces
      function eeh_pe_loc_get() to retireve the location code from
      dev-tree so that we can output it when hitting EEH errors.
      
      If primary PE bus is root bus, the PHB's dev-node would be tried
      prior to root port's dev-node. Otherwise, the upstream bridge's
      dev-node of the primary PE bus will be check for the location code
      directly.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      357b2f3d
  5. 20 5月, 2014 1 次提交
  6. 28 4月, 2014 7 次提交
    • G
      powerpc/powernv: Fundamental reset on PLX ports · b2b5efcf
      Gavin Shan 提交于
      The patch intends to support fundamental reset on PLX downstream
      ports. If the PCI device matches any one of the internal table,
      which includes PLX vendor ID, bridge device ID, register offset
      for fundamental reset and bit, fundamental reset will be done
      accordingly. Otherwise, it will fail back to hot reset.
      
      Additional flag (EEH_DEV_FRESET) is introduced to record the last
      reset type on the PCI bridge.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      b2b5efcf
    • G
      powerpc/eeh: Make the delay for PE reset unified · 26833a50
      Gavin Shan 提交于
      Basically, we have 3 types of resets to fulfil PE reset: fundamental,
      hot and PHB reset. For the later 2 cases, we need PCI bus reset hold
      and settlement delay as specified by PCI spec. PowerNV and pSeries
      platforms are running on top of different firmware and some of the
      delays have been covered by underly firmware (PowerNV).
      
      The patch makes the delays unified to be done in backend, instead of
      EEH core.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      26833a50
    • G
      powerpc/eeh: No hotplug on permanently removed dev · d2b0f6f7
      Gavin Shan 提交于
      The issue was detected in a bit complicated test case where
      we have multiple hierarchical PEs shown as following figure:
      
                      +-----------------+
                      | PE#3     p2p#0  |
                      |          p2p#1  |
                      +-----------------+
                              |
                      +-----------------+
                      | PE#4     pdev#0 |
                      |          pdev#1 |
                      +-----------------+
      
      PE#4 (have 2 PCI devices) is the child of PE#3, which has 2 p2p
      bridges. We accidentally had less-known scenario: PE#4 was removed
      permanently from the system because of permanent failure (e.g.
      exceeding the max allowd failure times in last hour), then we detects
      EEH errors on PE#3 and tried to recover it. However, eeh_dev instances
      for pdev#0/1 were not detached from PE#4, which was still connected to
      PE#3. All of that was because of the fact that we rely on count-based
      pcibios_release_device(), which isn't reliable enough. When doing
      recovery for PE#3, we still apply hotplug on PE#4 and pdev#0/1, which
      are not valid any more. Eventually, we run into kernel crash.
      
      The patch fixes above issue from two aspects. For unplug, we simply
      skip those permanently removed PE, whose state is (EEH_PE_STATE_ISOLATED
      && !EEH_PE_STATE_RECOVERING) and its frozen count should be greater
      than EEH_MAX_ALLOWED_FREEZES. For plug, we marked all permanently
      removed EEH devices with EEH_DEV_REMOVED and return 0xFF's on read
      its PCI config so that PCI core will omit them.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d2b0f6f7
    • G
      powerpc/eeh: Cleanup EEH subsystem variables · 8a5ad356
      Gavin Shan 提交于
      There're 2 EEH subsystem variables: eeh_subsystem_enabled and
      eeh_probe_mode. We needn't maintain 2 variables and we can just
      have one variable and introduce different flags. The patch also
      introduces additional flag EEH_FORCE_DISABLE, which will be used
      to disable EEH subsystem via boot parameter ("eeh=off") in future.
      Besides, the patch also introduces flag EEH_ENABLED, which is
      changed to disable or enable EEH functionality on the fly through
      debugfs entry in future.
      
      With the patch applied, the creteria to check the enabled EEH
      functionality is changed to:
      
      !EEH_FORCE_DISABLED && EEH_ENABLED : Enabled
                             Other cases : Disabled
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8a5ad356
    • G
      powerpc/eeh: Use cached capability for log dump · 2a18dfc6
      Gavin Shan 提交于
      When calling into eeh_gather_pci_data() on pSeries platform, we
      possiblly don't have pci_dev instance yet, but eeh_dev is always
      ready. So we use cached capability from eeh_dev instead of pci_dev
      for log dump there. In order to keep things unified, we also cache
      PCI capability positions to eeh_dev for PowerNV as well.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2a18dfc6
    • G
      powerpc/eeh: Block PCI-CFG access during PE reset · d0914f50
      Gavin Shan 提交于
      We've observed multiple PE reset failures because of PCI-CFG
      access during that period. Potentially, some device drivers
      can't support EEH very well and they can't put the device to
      motionless state before PE reset. So those device drivers might
      produce PCI-CFG accesses during PE reset. Also, we could have
      PCI-CFG access from user space (e.g. "lspci"). Since access to
      frozen PE should return 0xFF's, we can block PCI-CFG access
      during the period of PE reset so that we won't get recrusive EEH
      errors.
      
      The patch adds flag EEH_PE_RESET, which is kept during PE reset.
      The PowerNV/pSeries PCI-CFG accessors reuse the flag to block
      PCI-CFG accordingly.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d0914f50
    • G
      powerpc/eeh: Remove EEH_PE_PHB_DEAD · 9e049375
      Gavin Shan 提交于
      The PE state (for eeh_pe instance) EEH_PE_PHB_DEAD is duplicate to
      EEH_PE_ISOLATED. Originally, those PHBs (PHB PE) with EEH_PE_PHB_DEAD
      would be removed from the system. However, it's safe to replace
      that with EEH_PE_ISOLATED.
      
      The patch also clear EEH_PE_RECOVERING after fenced PHB has been handled,
      either failure or success. It makes the PHB PE state consistent with:
      
      	PHB functions normally		  NONE
      	PHB has been removed		  EEH_PE_ISOLATED
      	PHB fenced, recovery in progress  EEH_PE_ISOLATED | RECOVERING
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      9e049375
  7. 17 2月, 2014 1 次提交
  8. 15 1月, 2014 3 次提交
    • G
      powerpc/eeh: Handle multiple EEH errors · 7e4e7867
      Gavin Shan 提交于
      For one PCI error relevant OPAL event, we possibly have multiple
      EEH errors for that. For example, multiple frozen PEs detected on
      different PHBs. Unfortunately, we didn't cover the case. The patch
      enumarates the return value from eeh_ops::next_error() and change
      eeh_handle_special_event() and eeh_ops::next_error() to handle all
      existing EEH errors.
      
      As Ben pointed out, we needn't list_for_each_entry_safe() since we
      are not deleting any PHB from the hose_list and the EEH serialized
      lock should be held while purging EEH events. The patch covers those
      suggestions as well.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      7e4e7867
    • G
      powerpc/eeh: Hotplug improvement · f26c7a03
      Gavin Shan 提交于
      When EEH error comes to one specific PCI device before its driver
      is loaded, we will apply hotplug to recover the error. During the
      plug time, the PCI device will be probed and its driver is loaded.
      Then we wrongly calls to the error handlers if the driver supports
      EEH explicitly.
      
      The patch intends to fix by introducing flag EEH_DEV_NO_HANDLER and
      set it before we remove the PCI device. In turn, we can avoid wrongly
      calls the error handlers of the PCI device after its driver loaded.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      f26c7a03
    • G
      powerpc/eeh: Add restore_config operation · 1d350544
      Gavin Shan 提交于
      After reset on the specific PE or PHB, we never configure AER
      correctly on PowerNV platform. We needn't care it on pSeries
      platform. The patch introduces additional EEH operation eeh_ops::
      restore_config() so that we have chance to configure AER correctly
      for PowerNV platform.
      Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1d350544
  9. 24 7月, 2013 6 次提交
  10. 01 7月, 2013 1 次提交
  11. 25 6月, 2013 1 次提交
  12. 20 6月, 2013 9 次提交
  13. 10 1月, 2013 1 次提交
  14. 04 1月, 2013 1 次提交
    • G
      POWERPC: drivers: remove __dev* attributes. · cad5cef6
      Greg Kroah-Hartman 提交于
      CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
      markings need to be removed.
      
      This change removes the use of __devinit, __devexit_p, __devinitdata,
      __devinitconst, and __devexit from these drivers.
      
      Based on patches originally written by Bill Pemberton, but redone by me
      in order to handle some of the coding style issues better, by hand.
      
      Cc: Bill Pemberton <wfp5p@virginia.edu>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      cad5cef6