MISCBDCGE is a new register for Misc Backbone clock gate control
which is useful to control while resetting the link and ensuring
controller is in required state so add API to control it

HW recommends that we reset with CGCTL.MISCBDCGE disabled, so add
that while doing init chip and reset sequence.
Signed-off-by: NJayachandran B <jayachandran.b@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This provide the fix for firmware memory by freeing the pointer in driver
remove where it is safe to do so
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add the NAU88L25 + MAX98357A machine driver entry into
the machine table
Signed-off-by: NRohit Ainapure <rohit.m.ainapure@intel.com>
Signed-off-by: NFang, Yang A <yang.a.fang@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Some of the usecases can be marked as 'ignore_suspend' by
machine. For these on suspend we should keep audio controller
ON by saving the state and not suspending the device

For this we need to maintain a counter for these streams and be
active on suspend when such a stream is opened.
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Since we call _skl_resume which also initializes the chip we no
need to call these explicitly, so remove the duplication
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

For HDA codecs WAKEENABLE bit is to programmed if codec event
change has to wake the system when suspended.

In skylake I2S systems which are currently supported we have
only HDMI codec, which doesn't use this capability to detect a
HDMI connect/ disconnect event. HDMI HDA codec uses display
interface to detect connect/disconnect event.

This patch removes the WAKEBIT enabling during device D0/D3 as
this seems to cause spurious wakes on the system
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This patch adds skl_nau8825_ssn4567_i2s machine driver into
machine table
Signed-off-by: NFang, Yang A <yang.a.fang@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The firmware name is hard coded which doesnt allow to load
different platforms for various platforms so get this name from
available machine table and pass it to dsp context for loading
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Now that we have common match code in place, update the SKL
driver to use the common match routines for driver entry creation
for UEFI BIOS systems
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NOmair M Abdullah <omair.m.abdullah@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The driver runtime behaviour is fine but in suspend, we missed
setting the DSP to suspend and also missed resuming DSP on
resume.

Fix this by having common SKL suspend and resume routines which
power up/down links, suspend/resume DSP and other common
routines, and call these routines from both runtime as well as
system PM handlers
Signed-off-by: NJayachandran B <jayachandran.b@intel.com>
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

We have both I2S and hda codec support in the driver. codec_mask
check is relevant only for hda codec and some boards may have
only I2S Codec, so removed probe error in case no hda codec is
found and update the log to info as it may not be error.
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This ensures that the link is not requesting any clock and the
PLL can turn off. The link is powered when controller is brought
out of reset.
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Load and Initialize Non HDA Link Table in Skylake driver
to get platform configuration.
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NSubhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

If processing pipe capability is supported, add DSP support.
Adds initialization/free/suspend/resume DSP functionality.
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NSubhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Decoupled mode is where audio link is broken to frontend HDA and backend
(hda/i2s/dmic/hdmi) links. This patch adds support for decoupled mode and
then adds dais, dai ops for be/fe cpu dais and interrupt handler change to
support decoupled mode
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This patch follows up by adding the HDA controller operations. This
code is mostly derived from Intel HDA PCI driver without legacy bits
Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
Signed-off-by: NSubhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NMark Brown <broonie@kernel.org>