- 13 3月, 2015 1 次提交
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由 Fabio Estevam 提交于
We use dynamic memory mapping when using dt, so remove all the static mappings. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 11 3月, 2015 3 次提交
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由 Fabio Estevam 提交于
As mx25 is a dt-only platform, we can get rid of platform code support files, which are unused now. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
As there is no more mx25 board files, we can turn mx25 into a dt-only platform. Rename imx25-dt.c to mach-imx25.c to be consistent with the other i.MX SoCs. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Fabio Estevam 提交于
eukrea mx25 is well supported in device tree, so let's get rid of its board files. Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 06 3月, 2015 1 次提交
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由 Fabio Estevam 提交于
imx25-pdk.dts provides a more complete support than the board file version, so let's get rid of the board file. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 05 1月, 2015 1 次提交
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由 Anson Huang 提交于
This patch introduces an independent cpuidle driver for i.MX6SX, and supports arm power off in idle, totally 3 levels of cpuidle are supported as below: 1. ARM WFI; 2. SOC in WAIT mode; 3. SOC in WAIT mode + ARM power off. ARM power off can save at least 5mW power. This patch also replaces imx6q_enable_rbc with imx6_enable_rbc. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 23 11月, 2014 3 次提交
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由 Jingchang Lu 提交于
Freescale LS1021A SoCs deploy two cortex-A7 processors, this adds bring-up support for the secondary core. Signed-off-by: NJingchang Lu <b35083@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Jingchang Lu 提交于
The LS1021A SoC is a dual-core Cortex-A7 based processor, this adds the initial support for it. Signed-off-by: NJingchang Lu <b35083@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Lucas Stach 提交于
This implements a virtual clock used to abstract away all the steps needed in order to change the ARM clock, so we don't have to push all this clock handling into the cpufreq driver. While it will be used for i.MX53 at first it is generic enough to be used on i.MX6 later on. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 16 9月, 2014 2 次提交
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由 Shawn Guo 提交于
There are a couple of gate clocks are mutually exclusive on i.MX6, i.e. LVDSCLK1_IBEN and LVDSCLK1_OBEN. They cannot be enabled simultaneously. This patches adds an exclusive gate clock type specifically for such case. The clock driver will need to call imx_clk_gate_exclusive() to register a gate clock with parameter exclusive_mask indicating the mask of gate bits which are mutually exclusive to this gate clock. Right now, it only handles the exclusive gate clocks which are defined in a single hardware register, which is the case we're running into today. But it can be extended to handle exclusive gate clocks defined in different registers later if needed. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
This patch adds basic devicetree support for i.MX1 based SoCs. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 10 9月, 2014 1 次提交
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由 Fabio Estevam 提交于
All the current support of mach-mxt_td60 board can be converted to devicetree. Remove the board file. Cc: Alan Carvalho de Assis <acassis@gmail.com> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 01 9月, 2014 3 次提交
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由 Alexander Shiyan 提交于
mx1ads.c can be replaced with devicetree equivalent: imx1-ads.dts, so remove the board file. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
pcm970-baseboard.c and mach-pcm038.c can be replaced with their devicetree equivalents: imx27-phytec-phycore-rdk.dts and imx27-phytec-phycore-som.dtsi respectively, so remove the board files. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
eukrea_mbimx27-baseboard.c and mach-cpuimx27.c can be replaced with their devicetree equivalents: imx27-eukrea-mbimxsd27-baseboard.dts and imx27-eukrea-cpuimx27.dtsi respectively, so remove the board files. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Acked-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 18 8月, 2014 1 次提交
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由 Arnd Bergmann 提交于
My earlier patch 1fc593fe ("ARM: imx: build i.MX6 functions only when needed") fixed a problem with building an i.MX5 kernel, but now the problem has returned for the case where we allow ARMv6K SMP builds in multiplatform. With CONFIG_CPU_V7 disabled, but i.MX3 and SMP enabled, we get this build error: arch/arm/mach-imx/built-in.o: In function `v7_secondary_startup': :(.text+0x5124): undefined reference to `v7_invalidate_l1' This puts the code inside of an "ifdef CONFIG_SOC_IMX6" to hopefully do the right thing in all configurations. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 18 7月, 2014 7 次提交
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由 Alexander Shiyan 提交于
The board has no insufficient support to be fully functional and seems has no users. This patch removes support for this board. However, the support may be added in the future by using the devicetree. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
i.MX1 camera driver has been removed by the commit 90b05589. This patch removes remaining support files for this camera. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Arnd Bergmann 提交于
Building a kernel for imx6sx but without imx6q support results in this link error because of the missing cpuidle driver: arch/arm/mach-imx/built-in.o: In function `imx6sx_init_late'::(.init.text+0xc228): undefined reference to `imx6q_cpuidle_init' This patch adds a Makefile entry so we always build support for the imx6q_cpuidle code when at least one of the 6sx or 6q variants are enabled. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Alexander Shiyan 提交于
The board has no insufficient support to be fully functional and seems has no users. This patch removes support for this board. However, the support may be added in the future by using the devicetree. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
The only code left in mm-imx5.c is to create static mapping. While all IMX platform code are moved to use dynamic mapping, the file can just be removed now. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Since i.MX51 becomes a DT only platform, those non-DT support files can be removed now. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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由 Shawn Guo 提交于
Since i.MX51 becomes DT only now, we can drop option MACH_IMX51_DT and just use SOC_IMX51 instead. While at it, rename imx51-dt.c to mach-imx51.c to align with the name schema of other IMX DT only platforms. Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 16 5月, 2014 1 次提交
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由 Shawn Guo 提交于
Add basic suppport for i.MX6 SoloX SoC. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 13 5月, 2014 1 次提交
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由 Fabio Estevam 提交于
eukrea_mbimxsd51-baseboard.c and mach-cpuimx51sd.c can be replaced with their devicetree equivalents: imx51-eukrea-mbimxsd51-baseboard.dts and imx51-eukrea-cpuimx51.dtsi respectively, so remove the board files. This allows the conversion of mx51 to a devicetree-only platform. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Reviewed-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 30 4月, 2014 1 次提交
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由 Fabio Estevam 提交于
The device tree version for the babbage board (imx51-babbage.dtb) has a more complete support than the board file version, so remove the board file source code. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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- 05 3月, 2014 7 次提交
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由 Shawn Guo 提交于
Even when CONFIG_SUSPEND is enabled, it makes no sense to build suspend-imx6.o if none of i.MX6 support is built in. Let's build suspend-imx6.o only when both CONFIG_SUSPEND and CONFIG_SOC_IMX6 are enabled. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
The pm-imx6q.c works for all i.MX6 SoCs, so let's rename it to pm-imx6.c and have the build controlled by option CONFIG_SOC_IMX6. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
With v7_cpu_resume() being moved out of headsmp.S, all the remaining code in the file is only needed by CONFIG_SMP build. So we can control the build of headsmp.o with only obj-$(CONFIG_SMP) now. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
The suspend-imx6.S is introduced recently for suspend low-level assembly code. Since function v7_cpu_resume() is only used by suspend support, it makes sense to move the function into suspend-imx6.S, and control the build of the file with CONFIG_SUSPEND option. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Anson Huang 提交于
i.MX6SL's suspend in ocram function is derived from i.MX6Q, it can lower the DDR IO power from ~10mA@1.2V to ~1mA@1.2V, measured on i.MX6SL EVK board, SH5. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Anson Huang 提交于
When system enter suspend, we can set the DDR IO to high-Z state to save DDR IOs' power consumption, this operation can save many power(from ~26mA@1.5V to ~15mA@1.5V, measured on i.MX6Q SabreSD board, R25) of DDR IOs. To achieve that, we need to copy the suspend code to ocram and run the low level hardware related code(set DDR IOs to high-Z state) in ocram. If there is no ocram space available, then system will still do suspend in external DDR, hence no DDR IOs will be set to high-Z. The OCRAM usage layout is as below, ocram suspend region(4K currently): ======================== high address ====================== . . . ^ ^ ^ imx6_suspend code PM_INFO structure(imx6_cpu_pm_info) ======================== low address ======================= Reviewed-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Anson Huang 提交于
Add cpuidle support for i.MX6SL, currently only support two cpuidle levels(ARM wfi and WAIT mode), and add software workaround for WAIT mode errata as below: ERR005311 CCM: After exit from WAIT mode, unwanted interrupt(s) taken during WAIT mode entry process could cause cache memory corruption. Software workaround: To prevent this issue from occurring, software should ensure that the ARM to IPG clock ratio is less than 12:5 (that is < 2.4x), before entering WAIT mode. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 19 2月, 2014 1 次提交
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由 Shawn Guo 提交于
When building a kernel image with only CONFIG_CPU_IDLE but no CONFIG_PM, we will get the following link error. LD init/built-in.o arch/arm/mach-imx/built-in.o: In function `imx6q_enter_wait': platform-spi_imx.c:(.text+0x25c0): undefined reference to `imx6q_set_lpm' platform-spi_imx.c:(.text+0x25d4): undefined reference to `imx6q_set_lpm' arch/arm/mach-imx/built-in.o: In function `imx6q_cpuidle_init': platform-spi_imx.c:(.init.text+0x75d4): undefined reference to `imx6q_set_chicken_bit' make[1]: *** [vmlinux] Error 1 Since pm-imx6q.c has been a collection of library functions that access CCM low-power registers used by not only suspend but also cpuidle and other drivers, let's build pm-imx6q.c independently of CONFIG_PM to fix above error. Reported-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Cc: stable@vger.kernel.org Acked-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 31 12月, 2013 1 次提交
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由 Steffen Trumtrar 提交于
Cc: linux-arm-kernel@lists.infradead.org Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NDenis Carikli <denis@eukrea.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 09 12月, 2013 1 次提交
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由 Greg Ungerer 提交于
Add machine support code for the Freescale IMX50 SoC. The IMX50 is quite similar to the Freescale IMX53, and contains many of the same periperhal hardware modules, at the same address offsets as the IMX53. (Notable exceptions are that the IMX50 contains no CAN bus hardware, less GPIO, no VPU, it does contain an Electrophoretic display controller though). This support code uses some of the IMX53 setup code to reduce duplication of what would be identical init IO setup. Signed-off-by: NGreg Ungerer <gerg@uclinux.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 11 11月, 2013 1 次提交
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由 Shawn Guo 提交于
Building a kernel with the following options, CONFIG_SMP=n CONFIG_PM=y CONFIG_SOC_IMX6SL=y CONFIG_SOC_IMX6Q=n we will see the build error below. arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter': platform-spi_imx.c:(.text+0x2648): undefined reference to `v7_cpu_resume' make[1]: *** [vmlinux] Error 1 This is because that v7_cpu_resume() implemented in headsmp.S is also needed by imx6sl build. Let's build headsmp.S for CONFIG_SOC_IMX6SL as well. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 21 10月, 2013 1 次提交
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由 Shawn Guo 提交于
The imx6sl low power mode implementation inherits imx6q/dl one, and pm-imx6q.c can just work for imx6sl with some minor updates. Let's enable imx6sl suspend support by reusing pm-imx6q.c and use cpu_is_imxXX() to handle the those minor differences between imx6sl and imx6q/dl. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 16 8月, 2013 2 次提交
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由 Liu Ying 提交于
One register may have several fields to control some clocks. It is possible that the read/write values of some fields may map to different real functional values, so writing to the other fields in the same register may break a working clock tree. A real case is the aclk_podf field in the register 'CCM Serial Clock Multiplexer Register 1' of i.MX6Q/SDL SoC. This patch introduces a fixup hook for multiplexer clock which is called before writing a value to clock registers to support this kind of multiplexer clocks. Signed-off-by: NLiu Ying <Ying.Liu@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Liu Ying 提交于
One register may have several fields to control some clocks. It is possible that the read/write values of some fields may map to different real functional values, so writing to the other fields in the same register may break a working clock tree. A real case is the aclk_podf field in the register 'CCM Serial Clock Multiplexer Register 1' of i.MX6Q/SDL SoC. This patch introduces a fixup hook for divider clock which is called before writing a value to clock registers to support this kind of divider clocks. Signed-off-by: NLiu Ying <Ying.Liu@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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