- 19 5月, 2012 1 次提交
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由 Paul Mundt 提交于
cpu-sh4a headers take priority over cpu-sh4 ones by virtue of the build system, there's no need to try and mingle sh4a stuff in cpu-sh4. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 18 5月, 2012 1 次提交
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由 Paul Mundt 提交于
This migrates the cpu-family relative DMA IRQ definitions over to evt2irq() backed hwirq lookups. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 02 3月, 2010 1 次提交
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由 Guennadi Liakhovetski 提交于
Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 08 2月, 2010 2 次提交
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由 Guennadi Liakhovetski 提交于
Tested to work with a SIU ASoC driver on sh7722 (migor). Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 17 12月, 2009 1 次提交
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由 Guennadi Liakhovetski 提交于
Add a dmaengine platform device to sh7724, fix DMA channel interrupt numbers. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 04 8月, 2009 1 次提交
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 10 3月, 2009 1 次提交
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由 Nobuhiro Iwamatsu 提交于
This adds DMA support for newer SH-4A CPUs, particularly SH7763/64/80/85. This also enables multi IRQ support for platforms that have multiple vectors bound to the same IRQ source. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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