- 29 3月, 2011 1 次提交
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由 Thomas Gleixner 提交于
Scripted with coccinelle. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 25 3月, 2011 1 次提交
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由 Greg Ungerer 提交于
There is a lot of common code that could be shared between the m68k and m68knommu arch branches. It makes sense to merge the two branches into a single directory structure so that we can more easily share that common code. This is a brute force merge, based on a script from Stephen King <sfking@fdwdc.com>, which was originally written by Arnd Bergmann <arnd@arndb.de>. > The script was inspired by the script Sam Ravnborg used to merge the > includes from m68knommu. For those files common to both arches but > differing in content, the m68k version of the file is renamed to > <file>_mm.<ext> and the m68knommu version of the file is moved into the > corresponding m68k directory and renamed <file>_no.<ext> and a small > wrapper file <file>.<ext> is used to select between the two version. Files > that are common to both but don't differ are removed from the m68knommu > tree and files and directories that are unique to the m68knommu tree are > moved to the m68k tree. Finally, the arch/m68knommu tree is removed. > > To select between the the versions of the files, the wrapper uses > > #ifdef CONFIG_MMU > #include <file>_mm.<ext> > #else > #include <file>_no.<ext> > #endif On top of this file merge I have done a simplistic merge of m68k and m68knommu Kconfig, which primarily attempts to keep existing options and menus in place. Other than a handful of options being moved it produces identical .config outputs on m68k and m68knommu targets I tested it on. With this in place there is now quite a bit of scope for merge cleanups in future patches. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 15 3月, 2011 5 次提交
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由 Greg Ungerer 提交于
The EDGE Port module of some ColdFire parts using the intc-2 interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
Use a proper irq_startup() routine to intialize the interrupt priority and level register in the ColdFire intc-2 controller code. We shouldn't be checking if the priority/level has been set on every unmask operation. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The intc-2 interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The ColdFire 54xx family shares the same interrupt controller used on the 523x, 527x and 528x ColdFire parts, but it isn't offset relative to the IPSBAR register. The 54xx doesn't have an IPSBAR register. By including the base address of the peripheral registers in the register definitions (MCFICM_INTC0 and MCFICM_INTC1 in this case) we can avoid having to define a fake IPSBAR for the 54xx. And this makes the register address definitions of these more consistent, the majority of the other register address defines include the peripheral base address already. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 21 10月, 2010 3 次提交
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由 Greg Ungerer 提交于
The use of __do_IRQ is deprecated, so lets stop using it. Generally the interrupts on the supported processors here are level triggered, so this is strait forward to switch over to using the standard handle_level_irq flow handler. (Although some ColdFire parts support edge triggered GPIO line interrupts we have no support for them yet). Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Philippe De Muyter 提交于
The Coldfire MCF547x/MCF548x have the same interrupt controller as the MCF528x e.g., but only one, not two as in the MCF528x. Modify intc-2.c to support only one interrupt controller if MCFICM_INTC1 is not defined. Signed-off-by: NPhilippe De Muyter <phdm@macqel.be> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Philippe De Muyter 提交于
The chips lists were in commit logs, but should also be in source files. This way it is easier to choose the right source file for a not yet supported Coldfire. Signed-off-by: NPhilippe De Muyter <phdm@macqel.be> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 16 9月, 2009 1 次提交
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由 Greg Ungerer 提交于
Create general interrupt controller code for the many ColdFire version 2 cores that use the two region INTC interrupt controller. This includes the 523x family, 5270, 5271, 5274, 5275, and the 528x families. This code does proper masking and unmasking of interrupts. With this in place some of the driver hacks in place to support ColdFire interrupts can finally go away. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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