In Tegra30 clock file two clk objects were created for same UART clock.
Remove the duplicates and add clock aliases instead.

Update the Tegra20 clock file to make the names consistent.
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all
devices on the AHUB's configlink bus. The AHUB driver must be able to
call clk_get_sys() to retrieve the clock parameter for this function.
Add the necessary clock aliases to allow this.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>

Add basic tegra30 clock framework. Not all clocks are supported yet. Mainly
clocks requiring voltage scaling are not yet implemented in this version.

Based on work by Alex Frid <afrid@nvidia.com> and
Scott Williams <scwilliams@nvidia.com>.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>