1. 04 11月, 2014 1 次提交
  2. 05 9月, 2014 2 次提交
  3. 01 7月, 2014 1 次提交
    • P
      usb: dwc3: add support for USB 2.0-only core configuration · 0e1e5c47
      Paul Zimmerman 提交于
      Newer DWC3 controllers can be built for USB 2.0-only mode, where
      most of the USB 3.0 circuitry is left out. To support this mode,
      the driver must limit the speed programmed into the DCFG register
      to Hi-Speed or lower.
      
      Reads and writes to the PIPECTL register are left as-is, since
      they should be no-ops in USB 2.0-only mode. Calls to phy_init()
      etc. for the USB3 phy are also left as-is, since the no-op USB3
      phy should be used for USB 2.0-only mode controllers.
      Signed-off-by: NPaul Zimmerman <paulz@synopsys.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      0e1e5c47
  4. 06 3月, 2014 5 次提交
  5. 05 3月, 2014 4 次提交
  6. 20 2月, 2014 1 次提交
    • H
      usb: dwc3: fix wrong bit mask in dwc3_event_devt · 06f9b6e5
      Huang Rui 提交于
      Around DWC USB3 2.30a release another bit has been added to the
      Device-Specific Event (DEVT) Event Information (EvtInfo) bitfield.
      
      Because of that, what used to be 8 bits long, has become 9 bits long.
      
      Per dwc3 2.30a+ spec in the Device-Specific Event (DEVT), the field of
      Event Information Bits(EvtInfo) uses [24:16] bits, and it has 9 bits
      not 8 bits. And the following reserved field uses [31:25] bits not
      [31:24] bits, and it has 7 bits.
      
      So in dwc3_event_devt, the bit mask should be:
      event_info	[24:16]		9 bits
      reserved31_25	[31:25]		7 bits
      
      This patch makes sure that newer core releases will work fine with
      Linux and that we will decode the event information properly on new
      core releases.
      
      [ balbi@ti.com : improve commit log a bit ]
      
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NHuang Rui <ray.huang@amd.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      06f9b6e5
  7. 29 7月, 2013 6 次提交
  8. 15 7月, 2013 1 次提交
    • H
      usb: dwc3: fix wrong bit mask in dwc3_event_type · 1974d494
      Huang Rui 提交于
      Per dwc3 2.50a spec, the is_devspec bit is used to distinguish the
      Device Endpoint-Specific Event or Device-Specific Event (DEVT). If the
      bit is 1, the event is represented Device-Specific Event, then use
      [7:1] bits as Device Specific Event to marked the type. It has 7 bits,
      and we can see the reserved8_31 variable name which means from 8 to 31
      bits marked reserved, actually there are 24 bits not 25 bits between
      that. And 1 + 7 + 24 = 32, the event size is 4 byes.
      
      So in dwc3_event_type, the bit mask should be:
      is_devspec	[0]		1  bit
      type		[7:1]		7  bits
      reserved8_31	[31:8]		24 bits
      
      This patch should be backported to kernels as old as 3.2, that contain
      the commit 72246da4 "usb: Introduce
      DesignWare USB3 DRD Driver".
      
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NHuang Rui <ray.huang@amd.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      1974d494
  9. 18 3月, 2013 9 次提交
  10. 18 1月, 2013 5 次提交
    • V
      usb: dwc3: remove dwc3 dependency on host AND gadget. · 388e5c51
      Vivek Gautam 提交于
      DWC3 controller curretly depends on USB && USB_GADGET.
      Some hardware may like to use only host feature on dwc3,
      or only gadget feature.
      
      So, removing this dependency of USB_DWC3 on USB and USB_GADGET.
      Adding the mode of operaiton of DWC3 also here
      HOST/GADGET/DUAL_ROLE based on which features are enabled.
      
      [ balbi@ti.com :
      	. make sure we have default modes for all possible Kernel
      		configurations.
      	. Remove the config -> menuconfig change as it's unnecessary
      	. switch over to IS_ENABLED() ]
      
      CC: Doug Anderson <dianders@chromium.org>
      Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      388e5c51
    • P
      usb: dwc3: gadget: fix scatter gather implementation · e5ba5ec8
      Pratyush Anand 提交于
      To work with scatter gather properly, fixes have been done in number of
      functions. I will explain requirement of each fixes one by one.
      
      start_slot: used to retrieve all request of SG during cleanup
      
      dwc3_gadget_giveback: We need to skip link TRB if it was one of the
      intermediate TRB of SG.
      
      dwc3_prepare_one_trb: We need to track all submitted TRBs during
      cleanup. Since, all TRBs would be serially allocated, so we can just
      keep starting slot info and we can always find rest of them. We need to
      pass sg node number, so that we cab appropriately program ISOC_FIRST/ISOC,
      Chain etc.
      
      dwc3_prepare_trbs: last_one should be set when it is last node
      of SG as well as last node of request_list.
      
      __dwc3_cleanup_done_trbs: It has been prepared after re-factorization of
      dwc3_cleanup_done_reqs. It is called for each TRB of SG.
      Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      e5ba5ec8
    • P
      usb: dwc3: gadget: fix missed isoc · 7efea86c
      Pratyush Anand 提交于
      There are two reasons to generate missed isoc.
      
      1. when the host does not poll for all the data.
      2. because of application-side delays that prevent all the data from
      being transferred in programmed microframe.
      
      Current code was able to handle first case only.  This patch handles
      scenario 2 as well.Scenario 2 sometime may occur with complex gadget
      application, however it can be easily reproduced for testing purpose as
      follows:
      
      a. use isoc binterval as 1 in f_sourcesink.
      b. use pattern=0
      c. introduce a delay of 150us deliberately in source_sink_complete, so
      that after few frames it lands into scenario 2.
      d. now run testusb 16 (isoc in  test). You will notice that if this
      patch is not applied then isoc transfer is not able to recover after
      first missed.
      
      Current patch's approach is as under:
      
      If missed isoc occurs and there is no request queued then issue END
      TRANSFER, so that core generates next xfernotready and we will issue a
      fresh START TRANSFER.
      If there are still queued request then wait, do not issue either END or
      UPDATE TRANSFER, just attach next request in request_list during giveback.
      If any future queued request is successfully transferred then we will issue
      UPDATE TRANSFER for all request in the request_list.
      
      Cc: <stable@vger.kernel.org> # v3.6 v3.7 v3.8
      Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      7efea86c
    • F
      usb: dwc3: debugfs: convert our regdump to use regsets · d7668024
      Felipe Balbi 提交于
      regset is a generic implementation of regdump
      utility through debugfs.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      d7668024
    • F
      usb: dwc3: decrease event buffer size · 5da93478
      Felipe Balbi 提交于
      Currently we're allocating an entire page to
      serve as our event buffer. Provided our events
      are 4 bytes long, it's very unlikely we will
      even trigger 1k events at once.
      
      Even in the worst case scenario where every
      endpoint triggers one event and we still have
      a couple of error events, that would still
      be less than 40 events.
      
      In order to cope with future versions of the
      IP which could (or could not) increase the
      amount of possible events to trigger
      simultaneously, we're using an arbitrary size
      of 64 events for our event buffer.
      
      We're saving 3840 bytes by doing so.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      5da93478
  11. 31 10月, 2012 1 次提交
  12. 11 9月, 2012 1 次提交
  13. 03 8月, 2012 1 次提交
  14. 25 6月, 2012 1 次提交
  15. 06 6月, 2012 1 次提交