The reset-simple driver can be used without changes.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Acked-by: NGabriel Fernandez <gabriel.fernandez@st.com>

Add reset line status readback, inverted status support, and socfpga
device tree quirks to the simple reset driver, and use it to replace
the socfpga driver.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Copy reusable parts from the sunxi driver, to add a driver for simple
reset controllers with reset lines that can be controlled by toggling
bits in exclusive, contiguous register ranges using read-modify-write
cycles under a spinlock.

The following patches will replace compatible reset drivers with
reset-simple, extending it where necessary.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: NAlexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: NChen-Yu Tsai <wens@csie.org>

There is no plan yet to do a v2 board. And even if we were to do it only
some IPs would actually change, so it be best to add suffixes at that
point, not now !
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The reset controllers (on xRX200 and newer SoCs have two of them) are
provided by the RCU module. This was initially implemented as a simple
reset controller. However, the RCU module provides more functionality
(ethernet GPHYs, USB PHY, etc.), which makes it a MFD device.
The old reset controller driver implementation from
arch/mips/lantiq/xway/reset.c did not honor this fact.

For some devices the request and the status bits are different.
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Acked-by: NRob Herring <robh@kernel.org>
Cc: john@phrozen.org
Cc: kishon@ti.com
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17125/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This reverts commit 2acb037f.

We ended up merging the reset controller into the clock
controller so we can now get rid of this stand-alone
implementation.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The HSDK v1 periphery IPs can be reset by accessing some registers
from the CGU block.

The list of available reset lines is documented in the DT bindings.
Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Some TI Keystone family of SoCs contain a system controller (like the
Power Management Micro Controller (PMMC) on 66AK2G SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations
are provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.

This patch adds a reset driver that communicates to the system
controller over the TI SCI protocol for performing reset management
of various devices present on the SoC. Various reset functionalities
are achieved by the means of different TI SCI device operations
provided by the TI SCI framework.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
[s-anna@ti.com: documentation changes, revised commit message]
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
[p.zabel@pengutronix.de: const struct reset_control_ops]
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The Cortina Systems Gemini reset controller is a simple
32bit register with self-deasserting reset lines. It is
accessed using regmap over syscon.
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Rename the current Kconfig name used for the TI SYSCON Reset
driver from TI_SYSCON_RESET to RESET_TI_SYSCON to match the
convention used for all the reset drivers present at the
base reset folder.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This patch adds the reset controller functionality for
Peripheral PHYs to the Arria10 System Resource Chip.
Signed-off-by: NThor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add reset controller driver exposing various reset faculties,
implemented by System Reset Controller IP block.

Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This patch adds reset controller driver for ZTE's zx2967 family.
Signed-off-by: NBaoyou Xie <baoyou.xie@linaro.org>
Reviewed-by: NShawn Guo <shawnguo@kernel.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This driver uses the services provided by the BPMP firmware driver to
implement a reset driver based on the MRQ_RESET request.
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Also remove the RESET_CONTROLLER dependency, this Kconfig file is
included inside the menuconfig already.

Cc: Chen Feng <puck.chen@hisilicon.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.

Cc: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.

Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Gabriel Fernandez <gabriel.fernandez@st.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: NDinh Nguyen <dinguyen@opensource.altera.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.

Cc: Damien Horsley <Damien.Horsley@imgtec.com>
Acked-by: NJames Hartley <james.hartley@imgtec.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: NJoachim Eastwood <manabian@gmail.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.

Cc: Antoine Tenart <antoine.tenart@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Acked-by: NAban Bedel <albeu@free.fr>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This is the initial commit for UniPhier reset controller driver.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The STM32 MCUs family IPs can be reset by accessing some registers
from the RCC block.

The list of available reset lines is documented in the DT bindings.
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add a reset-controller driver for performing reset management of
various devices present on the SoC, with the reset registers shared
between devices in a common register memory space. This driver uses
the syscon/regmap frameworks to actually implement the various reset
functionalities needed by the reset consumer devices.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
[s-anna@ti.com: add documentation, syscon name change]
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This patch adds the platform driver for the Amlogic Meson SoC Reset
Controller.

The Meson8b and GXBB SoCs are supported.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add System reset controller driver for Oxford Semiconductor OXNAS SoC
Family.

CC: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add reset controller driver for Pistachio SoC
Signed-off-by: NDamien Horsley <Damien.Horsley@imgtec.com>
Signed-off-by: NJames Hartley <james.hartley@imgtec.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add reset driver for hi6220-hikey board,this driver supply deassert
of IP on hi6220 SoC.
Signed-off-by: NChen Feng <puck.chen@hisilicon.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The directory drivers/reset/ is guarded by CONFIG_RESET_CONTROLLER
in driver/Makefile.

CONFIG_RESET_CONTROLLER is boolean, so it always evaluates to 'y'
in drivers/reset/Makefile.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This adds a reset controller driver to control the Xilinx Zynq
AP-SoC's various resets.
Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NSören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The AR71XX/AR9XXX SoC have a simple reset controller with one bit per
reset line.
Signed-off-by: NAlban Bedel <albeu@free.fr>
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add reset driver for the Reset Generation Unit (RGU) found on NXP
LPC18xx and LPC43xx devies. This reset controller features up to 64
reset lines connected to different blocks and peripheral in the SoC.
Most reset lines on the controller are self clearing except for
those dealing with the Cortex-M0 cores on LPC43xx devices.

This driver also registers a restart handler that can be used to
reset the entire device.
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>

Add a reset controller for Marvell Berlin SoCs which is used by the
USB PHYs drivers (for now).
Signed-off-by: NAntoine Ténart <antoine.tenart@free-electrons.com>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Add a reset-controller driver for the socfpga platform.
The reset-controller has four banks with up to 32 entries all encapsulated in
one module block.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
---

Notes:
    Changes since v2:
        - remove superfluous ret in probe function
        - add Acked-by

    Changes since v1:
        - use BITS_PER_LONG everywhere instead of MAX_BANK_WIDTH
        - print pdev->dev.of_node->full_name on error
        - use proper IS_ERR/PTR_ERR

This patch adds a reset controller implementation for STMicroelectronics
STi family SoCs; it allows a group of related reset like controls found
in multiple system configuration registers to be represented by a single
controller device. System configuration registers are accessed through
the regmap framework and the mfd/syscon driver.

The implementation optionally supports waiting for the reset action to
be acknowledged in a separate status register and supports both
active high and active low reset lines. These properties are common across
all the reset channels in a specific reset controller instance, hence
all channels in a paritcular controller are expected to behave in the
same way.
Signed-off-by: NStephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>

The Allwinner A31 and most of the other Allwinner SoCs have an IP
maintaining a few other IPs in the SoC in reset by default. Among these
IPs are the A31's High Speed Timers, hence why we can't use the regular
driver construct in every cases, and need to call the registering
function directly during machine initialisation.

Apart from this, the implementation is fairly straightforward, and could
easily be moved to a generic MMIO-based reset controller driver if the
need ever arise.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>

This adds a simple API for devices to request being reset
by separate reset controller hardware and implements the
reset signal device tree binding.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NPavel Machek <pavel@ucw.cz>