- 10 8月, 2014 11 次提交
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
This is a wrapper around the interfaces defined in an earlier commit, and is also used by various userspace (either by a libdrm backend, or libpciaccess) tools/tests. In the future this will be extended to handle channels, replacing some long-unloved code we currently use, and allow fifo/display/mpeg (hi Ilia ;)) engines to all be exposed in the same way. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
This forms the basis for the new APIs that will be exposed to userspace, giving it access to: - Object method calls, the immediately useful of which is performance counters and the abiity to manipulate the ZBC tables. - Information on the child classes an object supports, in order to avoid having to try all supported classes until successful. - Notifications, which will be used in the future to inform the client if its channel was killed due to a lockup, etc. This commit imports the interfaces, but are not currently used. The DRM portion of the driver will be ported to speak to the core using these interfaces as much as possible. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
This is a lot of prep-work for being able to send event notifications back to userspace. Events now contain data, rather than a "something just happened" signal. Handler data is now embedded into a containing structure, rather than being kmalloc()'d, and can optionally have the notify routine handled in a workqueue. Various races between suspend/unload with display HPD/DP IRQ handlers automagically solved as a result. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Alexandre Courbot 提交于
Add support for reclocking on GK20A, using a statically-defined pstates table. The algorithms for calculating the coefficients and setting the clocks are directly taken from the ChromeOS kernel. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Alexandre Courbot 提交于
GK20A's BAR is functionally identical to NVC0's, but do not support being ioremapped write-combined. Create a BAR instance for GK20A that reflect that state. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
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由 Alexandre Courbot 提交于
Add a platform driver for Nouveau devices declared using the device tree or platform data. This driver currently supports GK20A on Tegra platforms and is only compiled for these platforms if Nouveau is enabled. Nouveau will probe the chip type itself using the BOOT0 register, so all this driver really needs to do is to make sure the module is powered and its clocks active before calling nouveau_drm_platform_probe(). Heavily based on work done by Thierry Reding. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
As a side note.. It's a bit hard to figure out how to name this commit.. GK20A is NVEA, which is before NV108 (GK208).. Confusing. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
As documented at: ftp://download.nvidia.com/open-gpu-doc/gk104-disable-graphics-power-gating/1/gk104-disable-graphics-power-gating.txt NVIDIA were not able document the steps necessary to detect whether this is required or not at this time. However, they did confirm that this procedure is safe to perform unconditionally on GK104/6. GK107 does not have the power gating feature, and it was recommended that we do not perform these steps there as the effects were not verified. The disable path is from observing the binary driver, and not documented in the link above. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 18 6月, 2014 1 次提交
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由 Ben Skeggs 提交于
Reported-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 11 6月, 2014 5 次提交
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
This will, at some point, be used to replace various bits and pieces of code doing direct bios parsing. For now, it'll just be used for some DP improvements. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
There's also provisions to allow a pad to be locked with a specific routing, for an indefinite period of time. This will be used in future patches. The G94+ pad driver will now also power-down pads when not required. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 10 6月, 2014 4 次提交
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由 Alexandre Courbot 提交于
Add a GR device for GK20A based on NVE4, with the correct classes definitions (GK20A's 3D class is 0xa297). Most of the NVE4 code can be used on GK20A, so make relevant bits of NVE4 available to other chips as well. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Alexandre Courbot 提交于
GK20A's FIFO is compatible with NVE0, but only features 128 channels and 1 runlist. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Reviewed-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Alexandre Courbot 提交于
Add a simple FB device for GK20A, as well as a RAM implementation suitable for chips that use system memory as video RAM. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Alexandre Courbot 提交于
Add support for initializing the priv ring of GK20A. This is done by the BIOS on desktop GPUs, but needs to be done by hand on Tegra. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 26 3月, 2014 9 次提交
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由 Ben Skeggs 提交于
Our ucode only partially works at this point, so requiring binary fw image for now. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
A bit different from NVIDIA's RFC patch, but I want this now for GM107. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 18 2月, 2014 1 次提交
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由 Ilia Mirkin 提交于
See https://bugs.freedesktop.org/show_bug.cgi?id=74492Reported-by: NRonald <ronald645@gmail.com> Suggested-by: NMarcin Kościelnicki <koriakin@0x04.net> Signed-off-by: NIlia Mirkin <imirkin@alum.mit.edu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 23 1月, 2014 4 次提交
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由 Ilia Mirkin 提交于
Signed-off-by: NIlia Mirkin <imirkin@alum.mit.edu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 03 12月, 2013 1 次提交
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由 Roy Spliet 提交于
Signed-off-by: NRoy Spliet <rspliet@eclipso.eu> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 08 11月, 2013 4 次提交
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由 Ben Skeggs 提交于
Not even remotely ready for the vast majority of the world. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
User control of this has been hard-coded as disabled for now. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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