Exynos initialization code now relies on obtaining the PMU address,
so prepare a PMU node for Exynos5410.

Fixes: fce9e5bb ("ARM: EXYNOS: Add support for mapping PMU base
address via DT")
Signed-off-by: NAndreas Faerber <afaerber@suse.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

As exynos_cpuidle_init() and exynos_cpufreq_init() functions have just
one line of code for registering platform devices. So we can move them
to exynos_dt_machine_init() and remove exynos_cpuidle_init() and
exynos_cpufreq_init(). This will help in reducing lines of code in
exynos.c, making it more clean.
Suggested-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Under "arm/mach-exynos" many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc. Let's convert
all these access using iomapped address.
This will help us in removing static mapping of PMU base address
as well as help in reducing dependency over machine header files.
Thus helping for migration of PMU implementation from machine to
driver folder which can be reused for ARM64 based SoC.

Also as we have removed static mappings from "regs-pmu.h" it does
not need map.h anymore. But "platsmp.c" needed this and till now it
got included indirectly. So lets move header inclusion of
"mach/map.h" from "regs-pmu.h" to "platsmp.c".
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Turning off a cluster when all 4 cores of the cluster are powered off
saves power significantly. Powering off the A15 L2 alone gives around
100mW in savings. Add support for powering off the A15/A7 clusters on
exynos5420/5800.

The patch enables specific register bits which ensure that:
   - cluster L2 will be turned on before the first man is powered up.
   - last man will be turned off before the cluster L2 is turned off.
   - core is powered down before powering it up.

Remove the exynos_cluster_power_control function completely as we can
rely on the above mentioned bits rather than polling the cluster power
status register.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Acked-by: NNicolas Pitre <nico@linaro.org>
Tested-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

...otherwise me lose user mode regs and the resulting
stack trace is useless.
Signed-off-by: NRichard Weinberger <richard@nod.at>

If do_ops() fails we have to release current->mm->mmap_sem
otherwise the failing task will never terminate.
Reported-by: NToralf Förster <toralf.foerster@gmx.de>
Signed-off-by: NRichard Weinberger <richard@nod.at>

Trinity discovered an execution path such that a task
can unmap his stub page.
Reported-by: NToralf Förster <toralf.foerster@gmx.de>
Signed-off-by: NRichard Weinberger <richard@nod.at>

This reverts commit 0974a9ca.
The real for for that issue is to release current->mm->mmap_sem in
fix_range_common().
Signed-off-by: NRichard Weinberger <richard@nod.at>

When CPU topology is specified in device tree, cpu_logical_map() does
not return core ID anymore, but rather full MPIDR value. This breaks
existing calculation of PMU register offsets on Exynos SoCs.

This patch fixes the problem by adjusting the code to use only core ID
bits of the value returned by cpu_logical_map() to allow CPU topology to
be specified in device tree on Exynos SoCs.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This patch add I2S (Inter-IC Sound) dt node which supports 1-port
stereo (1 channels) IIS-bus for audio interface with DMA-based
operation.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NInha Song <ideal.song@samsung.com>
Tested-by: NInha Song <ideal.song@samsung.com>
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This adds cros_ec to exynos5420-peach-pit and exynos5800-peach-pi,
including:
* The keyboard
* The i2c tunnel
* The tps65090 under the i2c tunnel
* The battery under the i2c tunnel

To add extra motivation, it should be noted that tps65090 is one of
the things needed to get display-related FETs turned on for pit and
pi.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: NTushar Behera <tushar.b@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NChander Kashyap <k.chander@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multi-cluster SoC's e.g Exynos5420.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series
boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only
two pmu interrupts. Thus, we can define two interrupts in the
exynos4.dtsi and extends the interrupts only exynos4412.dtsi.

Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: NChanho Park <chanho61.park@samsung.com>
Tested-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The pwm driver requires a clocks property referencing the pwm peripheral
clk.
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

udphs_clk (USB Device Controller clock) is referenced instead of
uhphs_clk (USB Host Controller clock).
Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Correct the typo error for the second "uhphs_clk".
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The i.MX6 reference manual doesn't make a clear distinction
between the fixed clock divider and the enable gate for the
pcie and sata reference clocks. This lead to the lvds mux
inputs in the imx6q clk driver to be parented from the
ref clock (which is the divider) instead of the actual gate,
which in turn prevents the upstream clock to actually be
enabled when lvds clk out is active.

This fixes a hard machine hang regression in kernel 3.16 for
boards where only pcie is active but no sata, as with this
kernel version the imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
Reported-by: NArne Ruhnau <arne.ruhnau@target-sg.com>
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Tested-by: NArne Ruhnau <arne.ruhnau@target-sg.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

The optimistic spin code assumes regular stores and cmpxchg() play nice;
this is found to not be true for at least: parisc, sparc32, tile32,
metag-lock1, arc-!llsc and hexagon.

There is further wreckage, but this in particular seemed easy to
trigger, so blacklist this.

Opt in for known good archs.
Signed-off-by: NPeter Zijlstra <peterz@infradead.org>
Reported-by: NMikulas Patocka <mpatocka@redhat.com>
Cc: David Miller <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: James Bottomley <James.Bottomley@hansenpartnership.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Jason Low <jason.low2@hp.com>
Cc: Waiman Long <waiman.long@hp.com>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: John David Anglin <dave.anglin@bell.net>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Davidlohr Bueso <davidlohr@hp.com>
Cc: stable@vger.kernel.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparclinux@vger.kernel.org
Link: http://lkml.kernel.org/r/20140606175316.GV13930@laptop.programming.kicks-ass.netSigned-off-by: NIngo Molnar <mingo@kernel.org>

Compile tested. "polling" is unused since commit f80c5b39
("sched/idle, x86: Switch from TS_POLLING to TIF_POLLING_NRFLAG").
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: NPeter Zijlstra <peterz@infradead.org>
Cc: Jiri Kosina <jkosina@suse.cz>
Link: http://lkml.kernel.org/r/1404138749.2978.6.camel@x41Signed-off-by: NIngo Molnar <mingo@kernel.org>

Display domain is removed due to instability issues. Explaining
the problem below:

exynos_init_late triggers the pm_genpd_poweroff_unused which powers
off the unused power domains. This call hits before the trigger to
deferred probes.

DRM DP Panel defers the probe due to supply get failure. By the time,
deferred probe is scheduled again, Display Power Domain is powered
off by pm_genpd_poweroff_unused.

FIMD and DP drivers are accessing registers during Probe and Bind
callbacks. If display domain is enabled/disabled around register
accesses, display domain gets unstable and we are getting Power Domain
Disable fail notification. Increasing the Timeout also didn't help.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add MAX98090 audio codec, I2S interface and the sound complex
nodes to enable audio on Odroid-X2/U3 boards.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

TFLASH (SDHCI2 controller) uses internal card detect line, but it looks
that the driver fails to operate it properly. Use GPIO interrupt on
SD_CDn line for detecting SD card state.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support for simple GPIO-based button availabled on
Exynos4 based Odroid boards. All supported boards have POWER button,
which has been defined in exynos4412-odroid-common.dtsi. X/X2 boards
also have additional user-configurable button which has been mapped to
KEY_HOME. All defined keys have been marked as possible wakeup source.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

On Odroid U2/U3 BUCK8 is used for providing power to also to P3V3
source, which is also connected to LAN9730 chip's nRESET signal. To
reset lan chip on system reboot, the BUCK8 output should not be used in
'always on' mode. This change has no impact on X/X2 boards.
Signed-off-by: NKamil Debski <k.debski@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch moves some parts of exynos4412-odroidx.dts to common
exynos4412-odroid-common.dtsi file and adds support for Odroid X2 and
U2/U3 boards. X2 is same as X, but it has faster SoC module (1.7GHz
instead of 1.4GHz), while U2/U3 differs from X2 by different way of
routing signals to host USB hub. It also lacks some hw modules not yet
supported by those dts files (i.e. LCD & touch panel).
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Last megabyte of RAM is used by secure firmware and should not be accessed
by Linux kernel, so correct available memory size in DTS file.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds basic support for USB modules (host and device) on
OdroidX board.
Signed-off-by: NKamil Debski <k.debski@samsung.com>
[removed incorrect port@2 node]
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support for common hardware modules available on all
Exynos4412-based Odroid boards, which already have complete support in
mainline kernel. This includes secure firmware calls, watchdog, g2d and
fimc (mem2mem) multimedia accelerators.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds port sub-nodes to exynos4 ehci and ohci modules, which
are required by recently merged new exynos4 usb2 phy support.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The mask-tpm-reset GPIO is used by the kernel to prevent the TPM from
being reset across sleep/wake.  If we don't set it to anything then
the TPM will be reset.  U-Boot will detect this as invalid
and will reset the system on resume time. This GPIO can always be low
and not hurt anything.  It will get pulled back high again during a
normal warm reset when it will default back to an input.

To properly preserve the TPM state across suspend/resume and to make
the chrome U-Boot happy, properly set the GPIO to mask the
reset to the TPM.
Signed-off-by: NVikas Sajjan <vikas.sajjan@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The mask-tpm-reset GPIO is used by the kernel to prevent the TPM from
being reset across sleep/wake.  If we don't set it to anything then
the TPM will be reset.  U-Boot will detect this as invalid
and will reset the system on resume time. This GPIO can always be low
and not hurt anything.  It will get pulled back high again during a
normal warm reset when it will default back to an input.

To properly preserve the TPM state across suspend/resume and to make
the chrome U-Boot happy, properly set the GPIO to mask the
reset to the TPM.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NVikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add support for mapping Samsung Power Management Unit (PMU)
base address from device tree.
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch removes unnecessary header file inclusion from pmu.c.
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
"regs-pmu.h" and hence needs to include this header file. As there is
no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
to remove "regs-pmu.h" header file dependency from "pm_domain.c"  it's
better we define this definition in "pm_domain.c" file itself and thus it
will help in removing header file inclusion from "pm_domain.c".
Also removing "S5P_" prefix from macro.
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Many files under "arm/mach-exynos" are having file path in file
comment section which is invalid now.
So for better code maintainability let's remove them.
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

While making PMU implementation to be device tree based, there are
few register offsets related with SYSREG present in regs-pmu.h, so
let's make a new header file "regs-sys.h" to keep all such SYSREG
related register offsets and remove them from "regs-pmu.h"
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

As machine function ops are used only in this file let's make
them static. Also remove unused and unwanted declarations from
common.h.
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

PINCTRL_EXYNOS is always selected by Exynos platform in its
machine Kconfig. Thus the code in the else part is never used.
Remove it.
Signed-off-by: NSachin Kamat <sachin.kamat@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>