- 03 7月, 2017 2 次提交
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由 Andreas Färber 提交于
The S500 SoC can start secondary CPUs without busy-looping for pen_release, so simplify the SMP code compared to the LeMaker kernel tree. Fixes: 172067e0 ("ARM: owl: Implement CPU enable-method for S500") Suggested-by: NArnd Bergmann <arnd@arndb.de> Cc: David Liu <liuwei@actions-semi.com> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Andreas Färber 提交于
Rely on the fallback to "Generic DT based system". This change is visible in /proc/cpuinfo. Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 02 7月, 2017 1 次提交
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由 Maxime Ripard 提交于
This reverts commits 2c0cba48 ("arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module") to 2428fd0f ("arm64: defconfig: Enable dwmac-sun8i driver on defconfig") and 3432a86e ("arm: sun8i: orangepipc: use internal phy-mode") to 5a79b4f2 ("arm: sun8i: orangepi-2: use internal phy-mode") that should be merged through the arm-soc tree, and end up in merge conflicts and build failures. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 7月, 2017 4 次提交
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由 Arnd Bergmann 提交于
With the new task struct randomization, we can run into a build failure for certain random seeds, which will place fields beyond the allow immediate size in the assembly: arch/arm/kernel/entry-armv.S: Assembler messages: arch/arm/kernel/entry-armv.S:803: Error: bad immediate value for offset (4096) Only two constants in asm-offset.h are affected, and I'm changing both of them here to work correctly in all configurations. One more macro has the problem, but is currently unused, so this removes it instead of adding complexity. Suggested-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de> [kees: Adjust commit log slightly] Signed-off-by: NKees Cook <keescook@chromium.org>
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由 Vladimir Murzin 提交于
DMA operations for NOMMU case have been just factored out into separate compilation unit, so don't keep dead code. Tested-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Tested-by: NAndras Szemzo <sza@esh.hu> Tested-by: NAlexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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由 Vladimir Murzin 提交于
Now, we have dedicated non-cacheable region for consistent DMA operations. However, that region can still be marked as bufferable by MPU, so it'd be safer to have barriers by default. M-class machines that didn't need it until now also likely won't need it in the future, therefore, we offer this as an option. Tested-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Tested-by: NAndras Szemzo <sza@esh.hu> Tested-by: NAlexandre TORGUE <alexandre.torgue@st.com> Reviewed-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com> Acked-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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由 Vladimir Murzin 提交于
R/M classes of cpus can have memory covered by MPU which in turn might configure RAM as Normal i.e. bufferable and cacheable. It breaks dma_alloc_coherent() and friends, since data can stuck in caches now or be buffered. This patch factors out DMA support for NOMMU configuration into separate entity which provides dedicated dma_ops. We have to handle there several cases: - configurations with MMU/MPU setup - configurations without MMU/MPU setup - special case for M-class, since caches and MPU there are optional In general we rely on default DMA area for coherent allocations or/and per-device memory reserves suitable for coherent DMA, so if such regions are set coherent allocations go from there. In case MMU/MPU was not setup we fallback to normal page allocator for DMA memory allocation. In case we run M-class cpus, for configuration without cache support (like Cortex-M3/M4) dma operations are forced to be coherent and wired with dma-noop (such decision is made based on cacheid global variable); however, if caches are detected there and no DMA coherent region is given (either default or per-device), dma is disallowed even MPU is not set - it is because M-class implement system memory map which defines part of address space as Normal memory. Reported-by: NAlexandre Torgue <alexandre.torgue@st.com> Reported-by: NAndras Szemzo <sza@esh.hu> Tested-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Tested-by: NAndras Szemzo <sza@esh.hu> Tested-by: NAlexandre TORGUE <alexandre.torgue@st.com> Reviewed-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NRussell King <rmk+kernel@armlinux.org.uk> [hch: removed the dma_supported() implementation that isn't required anymore] Signed-off-by: NChristoph Hellwig <hch@lst.de>
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- 30 6月, 2017 6 次提交
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由 Doug Berger 提交于
The pmd containing memblock_limit is cleared by prepare_page_table() which creates the opportunity for early_alloc() to allocate unmapped memory if memblock_limit is not pmd aligned causing a boot-time hang. Commit 965278dc ("ARM: 8356/1: mm: handle non-pmd-aligned end of RAM") attempted to resolve this problem, but there is a path through the adjust_lowmem_bounds() routine where if all memory regions start and end on pmd-aligned addresses the memblock_limit will be set to arm_lowmem_limit. Since arm_lowmem_limit can be affected by the vmalloc early parameter, the value of arm_lowmem_limit may not be pmd-aligned. This commit corrects this oversight such that memblock_limit is always rounded down to pmd-alignment. Fixes: 965278dc ("ARM: 8356/1: mm: handle non-pmd-aligned end of RAM") Signed-off-by: NDoug Berger <opendmb@gmail.com> Suggested-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
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由 LABBE Corentin 提交于
Since the PHY used is internal, simply set phy-mode as internal. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 LABBE Corentin 提交于
Since the PHY used is internal, simply set phy-mode as internal. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 LABBE Corentin 提交于
Since the PHY used is internal, simply set phy-mode as internal. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 LABBE Corentin 提交于
Since the PHY used is internal, simply set phy-mode as internal. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 LABBE Corentin 提交于
Since the PHY used is internal, simply set phy-mode as internal. Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 6月, 2017 1 次提交
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由 Tom Rini 提交于
A wide variety of TI platforms support NAND via the CONFIG_MTD_NAND_OMAP2 driver (and related BCH options), so enable this. In addition, multi_v7_defconfig supports the dm8168-evm and that supports root being on a SATA drive, so build the DM816 AHCI driver into the resulting kernel as well. Cc: Russell King <linux@armlinux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Mihail Grigorov <michael.grigorov@konsulko.com> Signed-off-by: NTom Rini <trini@konsulko.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 28 6月, 2017 3 次提交
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由 Christoph Hellwig 提交于
Same behavior, less code duplication. Signed-off-by: NChristoph Hellwig <hch@lst.de>
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由 Christoph Hellwig 提交于
And instead wire it up as method for all the dma_map_ops instances. Note that the code seems a little fishy for dmabounce and iommu, but for now I'd like to preserve the existing behavior 1:1. Signed-off-by: NChristoph Hellwig <hch@lst.de>
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由 Christoph Hellwig 提交于
DMA_ERROR_CODE is going to go away, so don't rely on it. Signed-off-by: NChristoph Hellwig <hch@lst.de>
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- 27 6月, 2017 1 次提交
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由 Jérémy Lefaure 提交于
I didn't find any use of this macro in the current kernel tree (with git grep). KTHREAD_SIZE is no longer used for a very very long time. So let's remove this definition. Signed-off-by: NJérémy Lefaure <jeremy.lefaure@lse.epita.fr> Reviewed-by: NVladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
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- 24 6月, 2017 2 次提交
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由 Bhushan Shah 提交于
As of commit 5052de8d, QCOM_SMD_RPM and various other config options enabled in the qcom_defconfig depends on the RPMSG. If QCOM_SMD_RPM config option is not selected it disables the REGULATOR_QCOM_SMD_RPM and other essential config options. Signed-off-by: NBhushan Shah <bshah@kde.org> Signed-off-by: NAndy Gross <andy.gross@linaro.org>
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由 Andreas Färber 提交于
Bring up the two remaining CPUs by calling into PM domain code. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 23 6月, 2017 7 次提交
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由 Dinh Nguyen 提交于
Use 'clock-frequency' binding for the i2c node that will put the I2C driver into the standard operating mode. 'speed-mode' was not a valid binding for the I2C driver, remove it. Signed-off-by: NAlan Tull <atull@kernel.org> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Marek Vasut 提交于
Add DT alias for the second ethernet present on mainboard rev 1.10. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Marek Vasut 提交于
Drop the LED node from VINing FPGA DT because the LED wiring is different on each mainboard revision. This wiring is therefore handled in mainboard DT Overlays. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Marek Vasut 提交于
Remove the EEPROMs attached to the I2C expander ports which lead to the backplane slots from the main VIN|ING DTS file. These EEPROMs are bound using separate DTO files, which lets us handle both two-slot and six-slot configuration of the backplane. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Marek Vasut 提交于
Enable the QSPI node and add the flash chips. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Marek Vasut 提交于
The ethernet block clock phandle must point to the clock node which represents the clock which directly supply the ethernet block. This is emac_x_clk , not emacx_clk , so fix this. From: Pavel Machek <pavel@denx.de> Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Tyler Baicar 提交于
Currently external aborts are unsupported by the guest abort handling. Add handling for SEAs so that the host kernel reports SEAs which occur in the guest kernel. When an SEA occurs in the guest kernel, the guest exits and is routed to kvm_handle_guest_abort(). Prior to this patch, a print message of an unsupported FSC would be printed and nothing else would happen. With this patch, the code gets routed to the APEI handling of SEAs in the host kernel to report the SEA information. Signed-off-by: NTyler Baicar <tbaicar@codeaurora.org> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NChristoffer Dall <cdall@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 22 6月, 2017 3 次提交
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由 Masahiro Yamada 提交于
Originally, generated-y and genhdr-y had different meaning, like follows: - generated-y: generated headers (other than asm-generic wrappers) - header-y : headers to be exported - genhdr-y : generated headers to be exported (generated-y + header-y) Since commit fcc8487d ("uapi: export all headers under uapi directories"), headers under UAPI directories are all exported. So, there is no more difference between generated-y and genhdr-y. We see two users of genhdr-y, arch/{arm,x86}/include/uapi/asm/Kbuild. They generate some headers in arch/{arm,x86}/include/generated/uapi/asm directories, which are obviously exported. Replace them with generated-y, and abolish genhdr-y. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NNicolas Dichtel <nicolas.dichtel@6wind.com>
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由 Andreas Färber 提交于
Allow to bring up CPU1. Based on LeMaker linux-actions tree. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Add ARCH_ACTIONS and mach-actions/owl.c for "actions,s500". Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 21 6月, 2017 3 次提交
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由 Marek Vasut 提交于
Increase the maximum number of GPIOs on SoCFPGA as this platform can have many GPIO controllers in the FPGA part. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Viresh Kumar 提交于
Compiling the DT file with W=1, DTC warns like follows: Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a unit name, but no reg property Fix this by replacing '@' with '-' as the OPP nodes will never have a "reg" property. Reported-by: NKrzysztof Kozlowski <krzk@kernel.org> Reported-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
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由 Dmitry Safonov 提交于
CRIU restores application mappings on the same place where they were before Checkpoint. That means, that we need to move vDSO and sigpage during restore on exactly the same place where they were before C/R. Make mremap() code update mm->context.{sigpage,vdso} pointers during VMA move. Sigpage is used for landing after handling a signal - if the pointer is not updated during moving, the application might crash on any signal after mremap(). vDSO pointer on ARM32 is used only for setting auxv at this moment, update it during mremap() in case of future usage. Without those updates, current work of CRIU on ARM32 is not reliable. Historically, we error Checkpointing if we find vDSO page on ARM32 and suggest user to disable CONFIG_VDSO. But that's not correct - it goes from x86 where signal processing is ended in vDSO blob. For arm32 it's sigpage, which is not disabled with `CONFIG_VDSO=n'. Looks like C/R was working by luck - because userspace on ARM32 at this moment always sets SA_RESTORER. Signed-off-by: NDmitry Safonov <dsafonov@virtuozzo.com> Acked-by: NAndy Lutomirski <luto@amacapital.net> Cc: linux-arm-kernel@lists.infradead.org Cc: Will Deacon <will.deacon@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Cyrill Gorcunov <gorcunov@openvz.org> Cc: Pavel Emelyanov <xemul@virtuozzo.com> Cc: Christopher Covington <cov@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
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- 20 6月, 2017 6 次提交
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由 Tony Lindgren 提交于
Recent change to use cpuhp_setup_state_cpuslocked() with commit fe2a5cd8 ("ARM/hw_breakpoint: Use cpuhp_setup_state_cpuslocked()") missed to change the related paired cpuhp_remove_state_nocalls_cpuslocked(). Now if arch_hw_breakpoint_init() fails, we get "WARNING: possible recursive locking detected" on the exit path. Fixes: fe2a5cd8 ("ARM/hw_breakpoint: Use cpuhp_setup_state_cpuslocked()") Signed-off-by: NTony Lindgren <tony@atomide.com> Acked-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-omap@vger.kernel.org Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Russell King <linux@armlinux.org.uk> Cc: "Paul E . McKenney" <paulmck@linux.vnet.ibm.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/20170616082238.15553-1-tony@atomide.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Christoph Hellwig 提交于
ARM and x86 had duplicated versions of the dma_ops structure, the only difference is that x86 hasn't wired up the set_dma_mask, mmap, and get_sgtable ops yet. On x86 all of them are identical to the generic version, so they aren't needed but harmless. All the symbols used only for xen_swiotlb_dma_ops can now be marked static as well. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Kishon Vijay Abraham I 提交于
commit 94647a30 ("ARM: dts: omap3-overo: Enable WiFi/BT combo") while enabling WiFi/BT combo added regulator to trigger the nReset signal of the Bluetooth module in vqmmc-supply. However BT should be handled by UART. Moreover "vqmmc" is not a defined binding for omap_hsmmc. While "vqmmc" in mmc2 hasn't caused any issues so far, mmc2 will start to mis-behave once omap_hsmmc defines "vqmmc" binding. Remove "vqmmc-supply" property in mmc2 here. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Peter Ujfalusi 提交于
The external request lines are used by tusb6010 on OMAP24xx platforms. Update the map so the driver can use dmaengine API to request the DMA channel. At the same time add temporary map containing only the external DMA request numbers for DT booted case on omap24xx since the tusb6010 stack is not yet supports DT boot. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBin Liu <b-liu@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Andreas Färber 提交于
Add Smart Power System node for PM domains. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Use a custom S500 enable-method for all CPUs. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 19 6月, 2017 1 次提交
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由 Hugh Dickins 提交于
Stack guard page is a useful feature to reduce a risk of stack smashing into a different mapping. We have been using a single page gap which is sufficient to prevent having stack adjacent to a different mapping. But this seems to be insufficient in the light of the stack usage in userspace. E.g. glibc uses as large as 64kB alloca() in many commonly used functions. Others use constructs liks gid_t buffer[NGROUPS_MAX] which is 256kB or stack strings with MAX_ARG_STRLEN. This will become especially dangerous for suid binaries and the default no limit for the stack size limit because those applications can be tricked to consume a large portion of the stack and a single glibc call could jump over the guard page. These attacks are not theoretical, unfortunatelly. Make those attacks less probable by increasing the stack guard gap to 1MB (on systems with 4k pages; but make it depend on the page size because systems with larger base pages might cap stack allocations in the PAGE_SIZE units) which should cover larger alloca() and VLA stack allocations. It is obviously not a full fix because the problem is somehow inherent, but it should reduce attack space a lot. One could argue that the gap size should be configurable from userspace, but that can be done later when somebody finds that the new 1MB is wrong for some special case applications. For now, add a kernel command line option (stack_guard_gap) to specify the stack gap size (in page units). Implementation wise, first delete all the old code for stack guard page: because although we could get away with accounting one extra page in a stack vma, accounting a larger gap can break userspace - case in point, a program run with "ulimit -S -v 20000" failed when the 1MB gap was counted for RLIMIT_AS; similar problems could come with RLIMIT_MLOCK and strict non-overcommit mode. Instead of keeping gap inside the stack vma, maintain the stack guard gap as a gap between vmas: using vm_start_gap() in place of vm_start (or vm_end_gap() in place of vm_end if VM_GROWSUP) in just those few places which need to respect the gap - mainly arch_get_unmapped_area(), and and the vma tree's subtree_gap support for that. Original-patch-by: NOleg Nesterov <oleg@redhat.com> Original-patch-by: NMichal Hocko <mhocko@suse.com> Signed-off-by: NHugh Dickins <hughd@google.com> Acked-by: NMichal Hocko <mhocko@suse.com> Tested-by: Helge Deller <deller@gmx.de> # parisc Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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