1. 05 1月, 2012 1 次提交
  2. 21 12月, 2011 2 次提交
  3. 20 11月, 2011 1 次提交
    • M
      drm/radeon/kms: add a CS ioctl flag not to rewrite tiling flags in the CS · e70f224c
      Marek Olšák 提交于
      This adds a new optional chunk to the CS ioctl that specifies optional flags
      to the CS parser. Why this is useful is explained below. Note that some regs
      no longer need the NOP relocation packet if this feature is enabled.
      Tested on r300g and r600g with this flag disabled and enabled.
      
      Assume there are two contexts sharing the same mipmapped tiled texture.
      One context wants to render into the first mipmap and the other one
      wants to render into the last mipmap. As you probably know, the hardware
      has a MACRO_SWITCH feature, which turns off macro tiling for small mipmaps,
      but that only applies to samplers.
      (at least on r300-r500, though later hardware likely behaves the same)
      
      So we want to just re-set the tiling flags before rendering (writing
      packets), right? ... No. The contexts run in parallel, so they may
      set the tiling flags simultaneously and then fire their command streams
      also simultaneously. The last one setting the flags wins, the other one
      loses.
      
      Another problem is when one context wants to render into the first and
      the last mipmap in one CS. Impossible. It must flush before changing
      tiling flags and do the rendering into the smaller mipmaps in another CS.
      
      Yet another problem is that writing copy_blit in userspace would be a mess
      involving re-setting tiling flags to please the kernel, and causing races
      with other contexts at the same time.
      
      The only way out of this is to send tiling flags with each CS, ideally
      with each relocation. But we already do that through the registers.
      So let's just use what we have in the registers.
      Signed-off-by: NMarek Olšák <maraeo@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      e70f224c
  4. 11 11月, 2011 1 次提交
  5. 28 10月, 2011 2 次提交
  6. 01 9月, 2011 2 次提交
    • M
      drm/radeon/kms: add a new gem_wait ioctl with read/write flags · d3ed7402
      Marek Olšák 提交于
      The new DRM_RADEON_GEM_WAIT ioctl combines GEM_WAIT_IDLE and GEM_BUSY (there
      is a NO_WAIT flag to get the latter) with USAGE_READ and USAGE_WRITE flags
      to take advantage of the new ttm_bo_wait changes.
      
      Also bump the DRM version.
      Signed-off-by: NMarek Olšák <maraeo@gmail.com>
      Reviewed-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      d3ed7402
    • M
      drm/ttm: add a way to bo_wait for either the last read or last write · dfadbbdb
      Marek Olšák 提交于
      Sometimes we want to know whether a buffer is busy and wait for it (bo_wait).
      However, sometimes it would be more useful to be able to query whether
      a buffer is busy and being either read or written, and wait until it's stopped
      being either read or written. The point of this is to be able to avoid
      unnecessary waiting, e.g. if a GPU has written something to a buffer and is now
      reading that buffer, and a CPU wants to map that buffer for read, it needs to
      only wait for the last write. If there were no write, there wouldn't be any
      waiting needed.
      
      This, or course, requires user space drivers to send read/write flags
      with each relocation (like we have read/write domains in radeon, so we can
      actually use those for something useful now).
      
      Now how this patch works:
      
      The read/write flags should passed to ttm_validate_buffer. TTM maintains
      separate sync objects of the last read and write for each buffer, in addition
      to the sync object of the last use of a buffer. ttm_bo_wait then operates
      with one the sync objects.
      Signed-off-by: NMarek Olšák <maraeo@gmail.com>
      Reviewed-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      dfadbbdb
  7. 08 6月, 2011 1 次提交
  8. 23 2月, 2011 1 次提交
  9. 22 11月, 2010 1 次提交
  10. 10 8月, 2010 1 次提交
  11. 09 8月, 2010 1 次提交
  12. 06 4月, 2010 1 次提交
    • J
      drm/radeon/kms: simplify & improve GPU reset V2 · 90aca4d2
      Jerome Glisse 提交于
      This simplify and improve GPU reset for R1XX-R6XX hw, it's
      not 100% reliable here are result:
      - R1XX/R2XX works bunch of time in a row, sometimes it
        seems it can work indifinitly
      - R3XX/R3XX the most unreliable one, sometimes you will be
        able to reset few times, sometimes not even once
      - R5XX more reliable than previous hw, seems to work most
        of the times but once in a while it fails for no obvious
        reasons (same status than previous reset just no same
        happy ending)
      - R6XX/R7XX are lot more reliable with this patch, still
        it seems that it can fail after a bunch (reset every
        2sec for 3hour bring down the GPU & computer)
      
      This have been tested on various hw, for some odd reasons
      i wasn't able to lockup RS480/RS690 (while they use to
      love locking up).
      
      Note that on R1XX-R5XX the cursor will disapear after
      lockup haven't checked why, switch to console and back
      to X will restore cursor.
      
      Next step is to record the bogus command that leaded to
      the lockup.
      
      V2 Fix r6xx resume path to avoid reinitializing blit
      module, use the gpu_lockup boolean to avoid entering
      inifinite waiting loop on fence while reiniting the GPU
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      90aca4d2
  13. 31 3月, 2010 2 次提交
  14. 18 2月, 2010 1 次提交
  15. 16 2月, 2010 1 次提交
  16. 11 2月, 2010 1 次提交
  17. 01 2月, 2010 1 次提交
  18. 21 1月, 2010 1 次提交
    • J
      drm/radeon: r6xx/r7xx possible security issue, system ram access · c8c15ff1
      Jerome Glisse 提交于
      This patch workaround a possible security issue which can allow
      user to abuse drm on r6xx/r7xx hw to access any system ram memory.
      This patch doesn't break userspace, it detect "valid" old use of
      CB_COLOR[0-7]_FRAG & CB_COLOR[0-7]_TILE registers and overwritte
      the address these registers are pointing to with the one of the
      last color buffer. This workaround will work for old mesa &
      xf86-video-ati and any old user which did use similar register
      programming pattern as those (we expect that there is no others
      user of those ioctl except possibly a malicious one). This patch
      add a warning if it detects such usage, warning encourage people
      to update their mesa & xf86-video-ati. New userspace will submit
      proper relocation.
      
      Fix for xf86-video-ati / mesa (this kernel patch is enough to
      prevent abuse, fix for userspace are to set proper cs stream and
      avoid kernel warning) :
      http://cgit.freedesktop.org/xorg/driver/xf86-video-ati/commit/?id=95d63e408cc88b6934bec84a0b1ef94dfe8bee7b
      http://cgit.freedesktop.org/mesa/mesa/commit/?id=46dc6fd3ed5ef96cda53641a97bc68c3bc104a9f
      
      Abusing this register to perform system ram memory is not easy,
      here is outline on how it could be achieve. First attacker must
      have access to the drm device and be able to submit command stream
      throught cs ioctl. Then attacker must build a proper command stream
      for r6xx/r7xx hw which will abuse the FRAG or TILE buffer to
      overwrite the GPU GART which is in VRAM. To achieve so attacker
      as to setup CB_COLOR[0-7]_FRAG or CB_COLOR[0-7]_TILE to point
      to the GPU GART, then it has to find a way to write predictable
      value into those buffer (with little cleverness i believe this
      can be done but this is an hard task). Once attacker have such
      program it can overwritte GPU GART to program GPU gart to point
      anywhere in system memory. It then can reusse same method as he
      used to reprogram GART to overwritte the system ram through the
      GART mapping. In the process the attacker has to be carefull to
      not overwritte any sensitive area of the GART table, like ring
      or IB gart entry as it will more then likely lead to GPU lockup.
      Bottom line is that i think it's very hard to use this flaw
      to get system ram access but in theory one can achieve so.
      
      Side note: I am not aware of anyone ever using the GPU as an
      attack vector, nevertheless we take great care in the opensource
      driver to try to detect and forbid malicious use of GPU. I don't
      think the closed source driver are as cautious as we are.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@linux.ie>
      c8c15ff1
  19. 02 12月, 2009 1 次提交
    • J
      drm/radeon/kms: Rework radeon object handling · 4c788679
      Jerome Glisse 提交于
      The locking & protection of radeon object was somewhat messy.
      This patch completely rework it to now use ttm reserve as a
      protection for the radeon object structure member. It also
      shrink down the various radeon object structure by removing
      field which were redondant with the ttm information. Last it
      converts few simple functions to inline which should with
      performances.
      
      airlied: rebase on top of r600 and other changes.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      4c788679
  20. 26 9月, 2009 1 次提交
  21. 25 9月, 2009 1 次提交
    • D
      drm/radeon/kms: don't require up to 64k allocations. (v2) · 513bcb46
      Dave Airlie 提交于
      This avoids needing to do a kmalloc > PAGE_SIZE for the main
      indirect buffer chunk, it adds an accessor for all reads from
      the chunk and caches a single page at a time for subsequent
      reads.
      
      changes since v1:
      Use a two page pool which should be the most common case
      a single packet spanning > PAGE_SIZE will be hit, but I'm
      having trouble seeing anywhere we currently generate anything like that.
      hopefully proper short page copying at end
      added parser_error flag to set deep errors instead of having to test
      every ib value fetch.
      fixed bug in patch that went to list.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      513bcb46
  22. 16 9月, 2009 2 次提交
  23. 15 7月, 2009 1 次提交
  24. 15 6月, 2009 1 次提交
    • J
      drm/radeon: introduce kernel modesetting for radeon hardware · 771fe6b9
      Jerome Glisse 提交于
      Add kernel modesetting support to radeon driver, use the ttm memory
      manager to manage memory and DRM/GEM to provide userspace API.
      In order to avoid backward compatibility issue and to allow clean
      design and code the radeon kernel modesetting use different code path
      than old radeon/drm driver.
      
      When kernel modesetting is enabled the IOCTL of radeon/drm
      driver are considered as invalid and an error message is printed
      in the log and they return failure.
      
      KMS enabled userspace will use new API to talk with the radeon/drm
      driver. The new API provide functions to create/destroy/share/mmap
      buffer object which are then managed by the kernel memory manager
      (here TTM). In order to submit command to the GPU the userspace
      provide a buffer holding the command stream, along this buffer
      userspace have to provide a list of buffer object used by the
      command stream. The kernel radeon driver will then place buffer
      in GPU accessible memory and will update command stream to reflect
      the position of the different buffers.
      
      The kernel will also perform security check on command stream
      provided by the user, we want to catch and forbid any illegal use
      of the GPU such as DMA into random system memory or into memory
      not owned by the process supplying the command stream. This part
      of the code is still incomplete and this why we propose that patch
      as a staging driver addition, future security might forbid current
      experimental userspace to run.
      
      This code support the following hardware : R1XX,R2XX,R3XX,R4XX,R5XX
      (radeon up to X1950). Works is underway to provide support for R6XX,
      R7XX and newer hardware (radeon from HD2XXX to HD4XXX).
      
      Authors:
          Jerome Glisse <jglisse@redhat.com>
          Dave Airlie <airlied@redhat.com>
          Alex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      771fe6b9