1. 19 3月, 2014 1 次提交
  2. 06 3月, 2014 1 次提交
    • B
      drm/i915: Fix PSR programming · 24bd9bf5
      Ben Widawsky 提交于
      | has a higher precedence than ?. Therefore, the calculation doesn't do
      at all what you would expect. Thanks to Ken for convincing me that this
      was indeed the issue. Send me back to C programmer school, please.
      
      I'm sort of surprised PSR was continuing to work for people. It should
      be broken IMO (and it was broken for me, but I had assumed it never
      worked).
      
      Regression from:
      commit ed8546ac
      Author: Ben Widawsky <benjamin.widawsky@intel.com>
      Date:   Mon Nov 4 22:45:05 2013 -0800
      
          drm/i915/bdw: Support eDP PSR
      
      Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
      Cc: Kenneth Graunke <kenneth.w.graunke@intel.com>
      Cc: Art Runyan <arthur.j.runyan@intel.com>
      Reported-by: N"Kumar, Kiran S" <kiran.s.kumar@intel.com>
      Cc: stable@vger.kernel.org [v3.13+]
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      24bd9bf5
  3. 13 2月, 2014 2 次提交
  4. 07 2月, 2014 1 次提交
    • D
      drm/i915: Disable dp aux irq on g4x · 4e6b788c
      Daniel Vetter 提交于
      Apparently it's broken in the exact same way as the gmbus irq. For
      reference of the full story see
      
      commit c12aba5a
      Author: Jiri Kosina <jkosina@suse.cz>
      Date:   Tue Mar 19 09:56:57 2013 +0100
      
          drm/i915: stop using GMBUS IRQs on Gen4 chips
      
      The effect is that we have a storm of unclaimed interrupts on the
      legacy irq line. If that one is used by a different device then the
      kernel will complain and rather quickly kill the irq source. Which
      breaks any device trying to actually use the legacy irq line.
      
      This regression has been introduced
      
      commit 4aeebd74
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Thu Oct 31 09:53:36 2013 +0100
      
          drm/i915: dp aux irq support for g4x/vlv
      
      Note that disabling MSI works around the issue, but we can't do that
      since apparently then the hw will miss interrupts. At least if
      relevant comments in i915_irq.c are accurate.
      
      v2: Cross-reference dp aux and gmbus gen4 comments.
      
      v3: Consolidate harder into i915_drv.h as suggested by Chris.
      
      Cc: Jani Nikula <jani.nikula@intel.com>
      Cc: Jiri Kosina <jkosina@suse.cz>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Reported-and-tested-by: NJiri Kosina <jkosina@suse.cz>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4e6b788c
  5. 31 1月, 2014 1 次提交
    • I
      drm/i915: vlv: fix DP PHY lockup due to invalid PP sequencer setup · 2cac613b
      Imre Deak 提交于
      Atm we setup the HW panel power sequencer logic both for eDP and DP
      ports. On eDP we then go on and start the power on sequence and commence
      with link training when it's ready. On DP we don't do the power on
      sequencing but do the link training immediately. At this point the DP
      PHY block gets stuck, since - supposedly - it is waiting for the power
      on sequence to finish. The actual register write that seems to hold off
      the PHY is PIPEX_PP_ON_DELAYS[Panel Control Port Select]. Writing here
      a non-0 value eventually sets PIPEX_PP_STATUS[Require Asset Status] to
      1 and blocks the PHY until the panel power on is ready.
      
      Fix this by not doing any PP sequencing setup for DP ports.
      
      Thanks to Ville Syrjälä, Jesse Barnes and Todd Previte for the help in
      tracking this down.
      
      Note that on older gmch platforms (where we have lvds instead of edp)
      we've hacked around this by writing the magic ABCD unlock key to PP
      registers, which disables the hw sanity checks.
      
      For edp all platforms thus far had the pch split, with the edp port in
      the north display complex and the PP registers on the pch the hw
      sanity checks (expressed through the "Require Asset Status" bit) was
      never functional, hence never a real issue.
      
      This regression has been introduce in
      
      commit bf13e81b
      Author: Jani Nikula <jani.nikula@intel.com>
      Date:   Fri Sep 6 07:40:05 2013 +0300
      
          drm/i915: add support for per-pipe power sequencing on vlv
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      [danvet: Add note about the bigger story here.]
      Cc: stable@vger.kernel.org
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2cac613b
  6. 23 1月, 2014 1 次提交
  7. 22 1月, 2014 2 次提交
  8. 18 12月, 2013 1 次提交
  9. 12 12月, 2013 2 次提交
  10. 11 12月, 2013 2 次提交
  11. 04 12月, 2013 2 次提交
  12. 28 11月, 2013 3 次提交
  13. 18 11月, 2013 1 次提交
    • D
      drm/i915: dp aux irq support for g4x/vlv · 4aeebd74
      Daniel Vetter 提交于
      Now we have this everywhere. Next up would be to wire up the DP
      hotplug pin to speed up panel power sequencing for eDP panels ...
      
      I've decided to leave the has_aux_irq logic in the code, it should
      come handy for hw bringup.
      
      For testing/fail-safety the dp aux code already has a timeout when
      waiting for interrupts to signal completion and screams rather loud if
      they don't arrive in time. Given that we need a real piece of hw to
      talk to anyway this is probably as good as it gets.
      
      v2: Don't check the dp aux channel bits on i965 machines, they have a
      different meaning there. Yay for reusing bits at will! Spotted by
      Jani.
      
      Cc: Jani Nikula <jani.nikula@intel.com>
      Reviewed-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4aeebd74
  14. 14 11月, 2013 1 次提交
  15. 11 11月, 2013 1 次提交
  16. 09 11月, 2013 4 次提交
  17. 07 11月, 2013 1 次提交
    • J
      drm/i915: make backlight functions take a connector · 752aa88a
      Jesse Barnes 提交于
      On VLV/BYT, backlight controls a per-pipe, so when adjusting the
      backlight we need to pass the correct info.  So make the externally
      visible backlight functions take a connector argument, which can be used
      internally to figure out the pipe backlight to adjust.
      
      v2: make connector pipe lookup check for NULL crtc (Jani)
          fixup connector check in ASLE code (Jani)
      v3: make sure we take the mode config lock around lookups (Daniel)
      v4: fix double unlock in panel_get_brightness (Daniel)
      v5: push ASLE work into a work queue (Daniel)
      v6: separate ASLE work to a prep patch, rebase (Jani)
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      752aa88a
  18. 05 11月, 2013 1 次提交
  19. 01 11月, 2013 1 次提交
  20. 31 10月, 2013 2 次提交
  21. 29 10月, 2013 1 次提交
    • J
      drm/i915/dp: workaround BIOS eDP bpp clamping issue · c6cd2ee2
      Jani Nikula 提交于
      This isn't a real fix to the problem, but rather a stopgap measure while
      trying to find a proper solution.
      
      There are several laptops out there that fail to light up the eDP panel
      in UEFI boot mode. They seem to be mostly IVB machines, including but
      apparently not limited to Dell XPS 13, Asus TX300, Asus UX31A, Asus
      UX32VD, Acer Aspire S7. They seem to work in CSM or legacy boot.
      
      The difference between UEFI and CSM is that the BIOS provides a
      different VBT to the kernel. The UEFI VBT typically specifies 18 bpp and
      1.62 GHz link for eDP, while CSM VBT has 24 bpp and 2.7 GHz link. We end
      up clamping to 18 bpp in UEFI mode, which we can fit in the 1.62 Ghz
      link, and for reasons yet unknown fail to light up the panel.
      
      Dithering from 24 to 18 bpp itself seems to work; if we use 18 bpp with
      2.7 GHz link, the eDP panel lights up. So essentially this is a link
      speed issue, and *not* a bpp clamping issue.
      
      The bug raised its head since
      commit 657445fe
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sat May 4 10:09:18 2013 +0200
      
          Revert "drm/i915: revert eDP bpp clamping code changes"
      
      which started clamping bpp *before* computing the link requirements, and
      thus affecting the required bandwidth. Clamping after the computations
      kept the link at 2.7 GHz.
      
      Even though the BIOS tells us to use 18 bpp through the VBT, it happily
      boots up at 24 bpp and 2.7 GHz itself! Use this information to
      selectively ignore the VBT provided value.
      
      We can't ignore the VBT eDP bpp altogether, as there are other laptops
      that do require the clamping to be used due to EDID reporting higher bpp
      than the panel can support.
      
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=59841
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67950Tested-by: NUlf Winkelvos <ulf@winkelvos.de>
      Tested-by: Njkp <jkp@iki.fi>
      CC: stable@vger.kernel.org
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c6cd2ee2
  22. 22 10月, 2013 1 次提交
    • D
      drm/sysfs: sort out minor and connector device object lifetimes. · 5bdebb18
      Dave Airlie 提交于
      So drm was abusing device lifetimes, by having embedded device structures
      in the minor and connector it meant that the lifetime of the internal drm
      objects (drm_minor and drm_connector) were tied to the lifetime of the device
      files in sysfs, so if something kept those files opened the current code
      would kfree the objects and things would go downhill from there.
      
      Now in reality there is no need for these lifetimes to be so intertwined,
      especailly with hotplugging of devices where we wish to remove the sysfs
      and userspace facing pieces before we can unwind the internal objects due
      to open userspace files or mmaps, so split the objects out so the struct
      device is no longer embedded and do what fbdev does and just allocate
      and remove the sysfs inodes separately.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      5bdebb18
  23. 18 10月, 2013 1 次提交
  24. 15 10月, 2013 1 次提交
  25. 10 10月, 2013 3 次提交
  26. 09 10月, 2013 2 次提交