- 07 4月, 2014 1 次提交
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由 Max Filippov 提交于
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
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- 22 2月, 2014 2 次提交
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由 Max Filippov 提交于
Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC base frequency in the platform data in case of build w/o CONFIG_OF. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
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由 Max Filippov 提交于
With this change the board needs to set up single clock object, users of this clock will get correct frequency automatically. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
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- 15 1月, 2014 2 次提交
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由 Baruch Siach 提交于
The recommended compatible string format, according to the ePAPR v1.1 standard, is "manufacturer,model". Change the xtensa cpu compatible strings to "cdns,xtensa-cpu". Also, change the boards compatible strings in a similar way. The pic compatible string will be dealt with in a separate patch. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
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由 Max Filippov 提交于
Extract xtensa built-in interrupt controller implementation from xtensa/kernel/irq.c and move it to other irqchips, providing way to instantiate it from the device tree. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NChris Zankel <chris@zankel.net>
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- 19 12月, 2012 1 次提交
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由 Max Filippov 提交于
Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60 and for ML605. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NChris Zankel <chris@zankel.net>
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