As the needs_bounce function is passed at DMA bounce register time,
we already know what the device bus type is, so we don't need to check
it each time the needs_bounce function is called.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Pass the device type specific needs_bounce function in at dmabounce
register time, avoiding the need for a platform specific global
function to do this.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

DMA addresses should not be casted to void * for printing.  Fix
that to be consistent with the rest of the file.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Pointers should be checked against NULL rather than 0, otherwise we
get sparse warnings.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

We already check that dev != NULL, so this won't be reached.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Move the decision whether to bounce into __dma_map_page(), before
the check for high pages.  This avoids triggering the high page
check for devices which aren't using dmabounce.  Fix the unmap path
to cope too.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Move the decision to perform DMA bouncing out of map_single() into its
own stand-alone function.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This check is done at the DMA API level, so there's no point repeating
it here.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Use dma_map_page()/dma_unmap_page() internals to handle dma_map_single()
and dma_unmap_single().
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

When map_single() is unable to obtain a safe buffer, we must return
the dma_addr_t error value, which is ~0 rather than 0.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This allows platforms to specify the rate of the SP804 clockevent via
the clk subsystem.  While ARM boards clock these at 1MHz, BCMRing also
has SP804 timers but are clocked at different rates.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This allows platforms to specify the clcokevent name upon registration.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This allows platforms to specify the rate of the SP804 clocksource via
the clk subsystem.  While ARM boards clock these at 1MHz, BCMRing also
has SP804 timers but are clocked at different rates.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This allows platforms to specify the clocksource name upon
registration, which is necessary should they wish to register more
than one sp804 clocksource.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources
to generic mmio clocksource infrastructure.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Alessandro Rubini <rubini@unipv.it>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Acked-by: NNicolas Pitre <nico@fluxnic.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Rather than each platform providing its own function to adjust the
zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this
adjustment.  This ensures that the actual DMA zone size and the
ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with
each other, and moves this complexity out of the platform code.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The GIC register accesses today make use of readl()/writel()
which prove to be very expensive when used along with mandatory
barriers. This mandatory barriers also introduces an un-necessary
and expensive l2x0_sync() operation. On Cortex-A9 MP cores, GIC
IO accesses from CPU are direct and doesn't go through L2X0 write
buffer.

A DSB before writel_relaxed() in gic_raise_softirq() is added to be
compliant with the Barrier Litmus document - the mailbox scenario.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>

Currently, the gic uses handle_level_irq for handling SPIs (Shared
Peripheral Interrupts), requiring active interrupts to be masked at
the distributor level during IRQ handling.

On a virtualised system, only the CPU interfaces are virtualised in
hardware. Accesses to the distributor must be trapped by the
hypervisor, adding latency to the critical interrupt path in Linux.

This patch modifies the GIC code to use handle_fasteoi_irq for handling
interrupts, which only requires us to signal EOI to the CPU interface
when handling is complete. Cascaded IRQ handling is also updated to use
the chained IRQ enter/exit functions to honour the flow control of the
parent chip.

Note that commit 846afbd1 ("GIC: Dont disable INT in ack callback")
broke cascading interrupts by forgetting to add IRQ masking. This is
no longer an issue because the unmask call is now unnecessary.

Tested on Versatile Express and Realview EB (1176 w/ cascaded GICs).
Tested-and-reviewed-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Tested-and-acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>

Convert some ARM architecture's common code to using
struct syscore_ops objects for power management instead of sysdev
classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>

The patch below removes an unused config variable found by using a kernel
cleanup script.
Signed-off-by: NJustin P. Mattock <justinmattock@gmail.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>

Use irq_set_chip_and_handler() instead. Converted with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Reorder 
irq_set_chip()
irq_set_chip_data()
irq_set_handler()

to

irq_set_chip()
irq_set_handler()
irq_set_chip_data()

so the next patch can combine irq_set_chip() and irq_set_handler() to
irq_set_chip_and_handler().

Automated conversion with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Convert to the new function names. Automated with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Few architectures combine the GIC with an external interrupt
controller. On such systems it may be necessary to update both
the GIC registers and the external controller's registers to control
IRQ behavior.

This can be addressed in couple of possible methods.
 1. Export common GIC routines along with 'struct irq_chip gic_chip'
    and allow architectures to have custom function by override.
 2. Provide architecture specific function pointer hooks
    within GIC library and leave platforms to add the necessary
    code as part of these hooks.

First one might be non-intrusive but have few shortcomings like arch
needs to have there own custom gic library. Locks used should be
common since it caters to same IRQs etc. Maintenance point of view
also it leads to multiple file fixes.

The second probably is cleaner and portable. It ensures that all the
common GIC infrastructure is not touched and also provides archs to
address their specific issue.

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NColin Cross <ccross@android.com>
Tested-by: NColin Cross <ccross@android.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The S5P6442 and S5PC100 SoCs have 4 VICs. However, default VIC number
is defined 2 in arch/arm/common. So can be happened some problem on it.
Basically, it requires for suspend and resume.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The S5PV210 SoC have 4 VICs. It requires for suspend and resume.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This cleans up after the conversion to irq_data.  Rename the function
to match the method, and remove the now useless lookup of the irq
descriptor which is never used.  Move the bitmask calculation out of
the irq_controller_lock region.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NPavel Machek <pma@sysgo.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Acked-by: NKristoffer Ericson <kristoffer.ericson@gmail.com>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Acked-by: NMike Rapoport <mike@compulab.co.il>

Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Acked-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>

Add ARM support for the DMA debug infrastructure, which allows the
DMA API usage to be debugged.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

arm: export dma_set_coherent_mask

While a regression was fixed with commit 710224fa (arm: fix
"arm: fix pci_set_consistent_dma_mask for dmabounce devices"), a
new one was introduced as dma_set_coherent_mask wasn't exported
for modules. This patch takes care for this issue.
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Avoid adding nasty genirq-specific code to local timers to enable PPI
interrupts.  Instead, provide a gic function to do this.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This avoids writing unnecessarily to gic_data[] from other CPUs,
making this a mostly read-only variable.
Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
Tested-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>