This patch updates the binding information to reflect the
extra dt options which are now supported by the sdhci-st.c
driver which enable support for stih407 family silicon.

STiH410 SoC and later support UHS modes for eMMC, so the
driver now makes use of these common bindings. Examples
are provided for both eMMC (which has additional bindings)
and also sd slot for STiH407.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add the regulator subnodes to the Qualcomm RPM MFD device tree bindings.
Signed-off-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

When the CONTINUE bit is set, the interrupt status we are polling to
identify if a transaction has finished can be sporadic.  Even though
the transfer has finished, the interrupt status may erroneously
indicate that there is still data in the FIFO.  This behaviour causes
random timeouts in large PIO transfers.

Instead of using the CONTINUE bit to control the CS lines, use the SPI
core's CS GPIO handling.  Also, now that the CONTINUE bit is not being
used, we can poll for the ALLDONE interrupt to indicate transfer
completion.
Signed-off-by: NSifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Document the Broadcom iProc PCIe platform interface device tree binding.
Signed-off-by: NRay Jui <rjui@broadcom.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NScott Branden <sbranden@broadcom.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Add compatible string definitions and supported pin functions.
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

r8a73a4 is R-Mobile APE6, not AP6.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Currently the "function" + "groups" combination is the only documented
format for pinmux nodes, although many drivers use "function" + "pins".
Update the generic pinctrl binding to include the "function" + "pins"
combination as well.
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add the compatible string for Meson8b in Meson pinctrl documentation
and add new information for Meson8b in source code comments.
Signed-off-by: NCarlo Caione <carlo@endlessm.com>
Acked-by: NBeniamino Galvani <b.galvani@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

According to description in 'include/net/dsa.h', in cascade switches
configurations where there are more than one interconnected devices,
'rtable' array in 'dsa_chip_data' structure is used to indicate which
port on this switch should be used to send packets to that are destined
for corresponding switch.

However, dsa_of_setup_routing_table() fills 'rtable' with port numbers
of the _target_ switch, but not current one.

This commit removes redundant devicetree parsing and adds needed port
number as a function argument. So dsa_of_setup_routing_table() now just
looks for target switch number by parsing parent of 'link' device node.

To remove possible misunderstandings with the way of determining target
switch number, a corresponding comment was added to the source code and
to the DSA device tree bindings documentation file.

This was tested on a custom board with two Marvell 88E6095 switches with
following corresponding routing tables: { -1, 10 } and { 8, -1 }.
Signed-off-by: NPavel Nakonechny <pavel.nakonechny@skitlab.ru>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Adding fsl,spi-cs-sck-delay and fsl,spi-sck-cs-delay properties to
support delays before and after starting the clock in a transfer.
Signed-off-by: NAaron Brice <aaron.brice@datasoft.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add documentation for generic SYSCON poweroff driver.
Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: NSebastian Reichel <sre@kernel.org>

Now there are generic phy type constants declared in phy.h, migrate over to
using them rather than defining our own. This change has been done as one
atomic commit to be bisectable.

Note: The values of the defines are the same, so there is no ABI breakage
with this patch.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>

Unlike previous Allwinner SoCs, there is no central PHY control block
on the A80. Also, OTG support is completely split off into a different
controller.

This adds a new driver to support the regular USB PHYs.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>

Add a minimal driver for dm816x USB. This makes USB work on dm816x
without any other changes needed as it can use the existing musb_dsps
glue layer for the USB controller.

Note that this phy is different from dm814x and am335x.

Cc: Bin Liu <binmlist@gmail.com>
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Bolle <pebolle@tiscali.nl>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>

The eMMC on a tablet I've will stop working / communicating as soon as
the kernel executes:

		mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
 				EXT_CSD_HPI_MGMT, 1,
 				card->ext_csd.generic_cmd6_time);

There seems to be no way to reliable identify eMMC-s which have a broken
hpi implementation, but at least for eMMC's which are soldered onto a board
we can work around this by specifying that hpi is broken in devicetree.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

As part of testing ahci_st driver working on stih407 I noticed
several things wrong in the DT documentation: -

1) Compatible string doesn't match the driver code
2) pwr-rst reset isn't documented (but exists in the driver)
3) some whitespace issues (spaces not tabs)

Also add in a stih407 family example into the doc.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NTejun Heo <tj@kernel.org>

The example is wrong in that the phys property should take a
phandle to the phy port.

Also with the changing over to generic PHY type constants we also
update that as well.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NTejun Heo <tj@kernel.org>

Some of the PMIC's could have specific regmap configuration
tables in future, so add specific compatible strings for known
PMIC's. Also print runtime detected chip revision information.
Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The IPQ8064 SoC has several RPM-controlled resources, an NSS fabrick
clock and four regulator resources.  Provide definitions for them.
Signed-off-by: NJosh Cartwright <joshc@codeaurora.org>
[sboyd@codeaurora.org: Drop regulator part of binding]
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Signed-off-by: NCarlo Caione <carlo@caione.org>
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Bindings documentation for the AXP20x driver. In this file also
sub-nodes are documented.
Signed-off-by: NCarlo Caione <carlo@caione.org>
[wens@csie.org: clarify interrupt source for the axp PMIC]
[wens@csie.org: explain dcdc-workmode in detail and trim lines to 80 chars]
[wens@csie.org: make regulator supplies optional if using unregulated input]
[wens@csie.org: use cubieboard2 regulator nodes as example]
[wens@csie.org: x-powers,dcdc-workmode default changed to 'current hardware setting']
[wens@csie.org: reorganized regulator related properties into separate section.]
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This adds support for the LIS3LV02 accelerometer found in the
ST Microelectronics Nomadik board series.

Cc: devicetree@vger.kernel.org
Cc: Denis CIOCCA <denis.ciocca@st.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NJonathan Cameron <jic23@kernel.org>

We have found that we can sometimes see read failures on boards with
high-capacitance SPI lines. It seems that the controller samples the Rx
data line too early, and its register interface has an "Rx Sample Delay"
setting to fine-tune against this issue.

This patch adds a new optional device tree entry that can configure this
delay in terms of nanoseconds. The kernel will calculate the
best-fitting amount of parent clock ticks to program the controller with
based on that.
Signed-off-by: NJulius Werner <jwerner@chromium.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

This patch adds driver data to support for Exynos5433 SoC.
The Exynos5433 has one USB3.0 Host and USB3.0 DRD(Dual Role Device).
Exynos5433 is simplar to Eyxnos7 but Exynos5433 have
one more USB3.0 Host controller.
Signed-off-by: NJaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add device tree binding documentation for IPROC SDHCI driver.
Acked-by: NRay Jui <rjui@broadcom.com>
Signed-off-by: NCorneliu Doban <cdoban@broadcom.com>
Signed-off-by: NScott Branden <sbranden@broadcom.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Implements HS400 mode support for exynos host driver.
This also include some updates as new mode is added.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com>
[Alim: addressed review comments]
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The external IRQ controller has a functional clock, which is used for
power management. Document it.

Fix a typo in the r8a73a4 SoC name while we're at it.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: NSimon Horman <horms+renesas@verge.net.au>
Link: https://lkml.kernel.org/r/1426704961-27322-4-git-send-email-geert+renesas@glider.beSigned-off-by: NJason Cooper <jason@lakedaemon.net>

Document the fact that some Exynos PMUs are capable of acting as
an interrupt controller.
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088693-15724-3-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>

Add compatible string for imx6sx-usbmisc.
Signed-off-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

pinconf_generic_dt_node_to_map() scans only subnodes of the pinctrl-0 pahndle,
not the referenced node itself. Change the example nodes to match.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Document the GPIO/PINCONF device tree binding for Broadcom Cygnus SoC
Signed-off-by: NRay Jui <rjui@broadcom.com>
Reviewed-by: NScott Branden <sbranden@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add devicetree bindings for Mediatek SoC pinctrl driver.
Signed-off-by: NHongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Device tree binding documentation for Broadcom Cygnus IOMUX driver
Signed-off-by: NRay Jui <rjui@broadcom.com>
Reviewed-by: NScott Branden <sbranden@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add a binding for the OMAP4/5 wake-up generator, which acts as
an interrupt controller feeding into the GIC.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088629-15377-7-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>

Nobody will regret it.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088629-15377-6-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>

Make it look like a real interrupt controller.
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088629-15377-4-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>

Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088583-15097-6-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>

To connect the channel of USB-DMAC to USBHS DnFIFO number, this patch
adds this channel/FIFO number in dma-names. Otherwise, this driver
needs to add analysis code for device tree.
Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>