1. 06 3月, 2017 1 次提交
    • F
      irqchip/crossbar: Fix incorrect type of local variables · 077dbaee
      Franck Demathieu 提交于
      The max and entry variables are unsigned according to the dt-bindings.
      Fix following 3 sparse issues (-Wtypesign):
      
        drivers/irqchip/irq-crossbar.c:222:52: warning: incorrect type in argument 3 (different signedness)
        drivers/irqchip/irq-crossbar.c:222:52:    expected unsigned int [usertype] *out_value
        drivers/irqchip/irq-crossbar.c:222:52:    got int *<noident>
      
        drivers/irqchip/irq-crossbar.c:245:56: warning: incorrect type in argument 4 (different signedness)
        drivers/irqchip/irq-crossbar.c:245:56:    expected unsigned int [usertype] *out_value
        drivers/irqchip/irq-crossbar.c:245:56:    got int *<noident>
      
        drivers/irqchip/irq-crossbar.c:263:56: warning: incorrect type in argument 4 (different signedness)
        drivers/irqchip/irq-crossbar.c:263:56:    expected unsigned int [usertype] *out_value
        drivers/irqchip/irq-crossbar.c:263:56:    got int *<noident>
      Signed-off-by: NFranck Demathieu <fdemathieu@gmail.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      077dbaee
  2. 11 5月, 2016 1 次提交
    • J
      irqchip: Mask the non-type/sense bits when translating an IRQ · a2a8fa55
      Jon Hunter 提交于
      The firmware parameter that contains the IRQ sense bits may also contain
      other data. When return the IRQ type, bits outside of these sense bits
      should be masked. If these bits are not masked and
      irq_create_fwspec_mapping() is called to map an IRQ, then the comparison
      of the type returned from irq_domain_translate() will never match
      that returned by irq_get_trigger_type() (because this function masks the
      none sense bits) and so we will always call irq_set_irq_type() to program
      the type even if it was not really necessary.
      
      Currently, the downside to this is unnecessarily re-programmming the type
      but nevertheless this should be avoided.
      
      The Tegra LIC and TI Crossbar irqchips all have client instances (from
      reviewing the device-tree sources) where bits outside the IRQ sense bits
      are set, but do not mask these bits. Therefore, ensure these bits are
      masked for these irqchips.
      Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
      Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      a2a8fa55
  3. 14 10月, 2015 2 次提交
  4. 20 8月, 2015 3 次提交
    • G
      irqchip/crossbar: Restore set_wake functionality · 8200fe43
      Grygorii Strashko 提交于
      The TI crossbar irqchip doesn't provides any facility to configure the
      wakeup sources, but the conversion to hierarchical irqdomains set the
      irq_set_wake callback to irq_chip_set_wake_parent. The parent chip
      (OMAP wakeupgen) has no irq_set_wake function either so the call will
      fail with -ENOSYS. As a result the irq_set_wake() call in the resume
      path will trigger an 'Unbalanced wake disable' warning.
      
      Before the conversion the GIC irqchip was the top level irqchip and
      correctly flagged with IRQCHIP_SKIP_SET_WAKE.
      
      Restore the correct behaviour by removing the irq_set_type callback
      from the crossbar irqchip and set the IRQCHIP_SKIP_SET_WAKE flag which
      lets the irq_set_irq_wake() call from the driver succeed.
      
      [ tglx: Massaged changelog ]
      
      Fixes: 783d3186 ('irqchip: crossbar: Convert dra7 crossbar...')
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Cc: Sudeep Holla <sudeep.holla@arm.com>
      Cc: <linux@arm.linux.org.uk>
      Cc: <nsekhar@ti.com>
      Cc: <jason@lakedaemon.net>
      Cc: <balbi@ti.com>
      Cc: <linux-arm-kernel@lists.infradead.org>
      Cc: <tony@atomide.com>
      Cc: <marc.zyngier@arm.com>
      Cc: stable@vger.kernel.org # 4.1
      Link: http://lkml.kernel.org/r/1439554830-19502-7-git-send-email-grygorii.strashko@ti.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      8200fe43
    • G
      irqchip/crossbar: Restore the mask on suspend behaviour · 4fd8f47e
      Grygorii Strashko 提交于
      The ARM GIC requires that all interrupts which are not used as a
      wakeup source have to be masked during suspend.
      
      The conversion of the crossbar irqchip to hierarchical irq domains
      failed to mark the crossbar irqchip with the IRQCHIP_MASK_ON_SUSPEND
      flag and therefor broke the suspend requirement of the GIC.
      
      Before the conversion the flags were visible because the GIC was the
      top level irqchip. After the conversion the crossbar irqchip is the
      top level irq chip whose flags are evaluated in suspend_device_irq().
      As the flag is not set the masking of the non-wakeup irqs is not
      invoked which breaks suspend.
      
      Add the IRQCHIP_MASK_ON_SUSPEND flag to the crossbar irqchip, so the
      GIC interrupts get masked properly.
      
      [ tglx: Massaged changelog ]
      
      Fixes: 783d3186 ('irqchip: crossbar: Convert dra7 crossbar...')
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Cc: Sudeep Holla <sudeep.holla@arm.com>
      Cc: <linux@arm.linux.org.uk>
      Cc: <nsekhar@ti.com>
      Cc: <jason@lakedaemon.net>
      Cc: <balbi@ti.com>
      Cc: <linux-arm-kernel@lists.infradead.org>
      Cc: <tony@atomide.com>
      Cc: <marc.zyngier@arm.com>
      Cc: stable@vger.kernel.org # 4.1
      Link: http://lkml.kernel.org/r/1439554830-19502-6-git-send-email-grygorii.strashko@ti.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      4fd8f47e
    • G
      irqchip/crossbar: Restore the irq_set_type() mechanism · e269ec42
      Grygorii Strashko 提交于
      The conversion of the crossbar irqchip to hierarchical irq domains
      failed to provide a mechanism to properly set the trigger type of an
      interrupt.
      
      The crossbar irq chip itself has no mechanism and therefor no
      irq_set_type() callback. The code before the conversion relayed the
      trigger configuration directly to the underlying GIC.
      
      Restore the correct behaviour by setting the crossbar irq_set_type
      callback to irq_chip_set_type_parent(). This propagates the
      set_trigger() call to the underlying GIC irqchip.
      
      [ tglx: Massaged changelog ]
      
      Fixes: 783d3186 ('irqchip: crossbar: Convert dra7 crossbar...')
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Cc: Sudeep Holla <sudeep.holla@arm.com>
      Cc: <linux@arm.linux.org.uk>
      Cc: <nsekhar@ti.com>
      Cc: <jason@lakedaemon.net>
      Cc: <balbi@ti.com>
      Cc: <linux-arm-kernel@lists.infradead.org>
      Cc: <tony@atomide.com>
      Cc: <marc.zyngier@arm.com>
      Cc: stable@vger.kernel.org # 4.1
      Link: http://lkml.kernel.org/r/1439554830-19502-4-git-send-email-grygorii.strashko@ti.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      e269ec42
  5. 12 7月, 2015 1 次提交
  6. 15 3月, 2015 1 次提交
  7. 18 8月, 2014 1 次提交
  8. 01 7月, 2014 15 次提交
  9. 29 4月, 2014 1 次提交
  10. 05 2月, 2014 1 次提交
    • S
      DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP · 96ca848e
      Sricharan R 提交于
      Some socs have a large number of interrupts requests to service
      the needs of its many peripherals and subsystems. All of the
      interrupt lines from the subsystems are not needed at the same
      time, so they have to be muxed to the irq-controller appropriately.
      In such places a interrupt controllers are preceded by an CROSSBAR
      that provides flexibility in muxing the device requests to the controller
      inputs.
      
      This driver takes care a allocating a free irq and then configuring the
      crossbar IP as a part of the mpu's irqchip callbacks. crossbar_init should
      be called right before the irqchip_init, so that it is setup to handle the
      irqchip callbacks.
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Signed-off-by: NSricharan R <r.sricharan@ti.com>
      Acked-by: Kumar Gala <galak@codeaurora.org> (for DT binding portion)
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Acked-by: NThomas Gleixner <tglx@linutronix.de>
      96ca848e