1. 30 6月, 2005 1 次提交
  2. 29 6月, 2005 16 次提交
  3. 28 6月, 2005 23 次提交
    • G
      [PATCH] PCI: use the MCFG table to properly access pci devices (x86-64) · 1cde8a16
      Greg Kroah-Hartman 提交于
      Now that we have access to the whole MCFG table, let's properly use it
      for all pci device accesses (as that's what it is there for, some boxes
      don't put all the busses into one entry.)
      
      If, for some reason, the table is incorrect, we fallback to the "old
      style" of mmconfig accesses, namely, we just assume the first entry in
      the table is the one for us, and blindly use it.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      1cde8a16
    • G
      [PATCH] PCI: use the MCFG table to properly access pci devices (i386) · d57e26ce
      Greg Kroah-Hartman 提交于
      Now that we have access to the whole MCFG table, let's properly use it
      for all pci device accesses (as that's what it is there for, some boxes
      don't put all the busses into one entry.)
      
      If, for some reason, the table is incorrect, we fallback to the "old
      style" of mmconfig accesses, namely, we just assume the first entry in
      the table is the one for us, and blindly use it.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      d57e26ce
    • G
      [PATCH] PCI: add proper MCFG table parsing to ACPI core. · 54549391
      Greg Kroah-Hartman 提交于
      This patch is the first step in properly handling the MCFG PCI table.
      It defines the structures properly, and saves off the table so that the
      pci mmconfig code can access it.  It moves the parsing of the table a
      little later in the boot process, but still before the information is
      needed.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      54549391
    • M
      [PATCH] PCI: fix-pci-mmap-on-ppc-and-ppc64.patch · 2311b1f2
      Michael Ellerman 提交于
      This is an updated version of Ben's fix-pci-mmap-on-ppc-and-ppc64.patch
      which is in 2.6.12-rc4-mm1.
      
      It fixes the patch to work on PPC iSeries, removes some debug printks
      at Ben's request, and incorporates your
      fix-pci-mmap-on-ppc-and-ppc64-fix.patch also.
      
      Originally from Benjamin Herrenschmidt <benh@kernel.crashing.org>
      
      This patch was discussed at length on linux-pci and so far, the last
      iteration of it didn't raise any comment.  It's effect is a nop on
      architecture that don't define the new pci_resource_to_user() callback
      anyway.  It allows architecture like ppc who put weird things inside of
      PCI resource structures to convert to some different value for user
      visible ones.  It also fixes mmap'ing of IO space on those archs.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      2311b1f2
    • K
      [PATCH] ACPI based I/O APIC hot-plug: ia64 support · 0e888adc
      Kenji Kaneshige 提交于
      This is an ia64 implementation of acpi_register_ioapic() and
      acpi_unregister_ioapic() interfaces.
      Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      0e888adc
    • K
      [PATCH] ACPI based I/O APIC hot-plug: add interfaces · b1bb248a
      Kenji Kaneshige 提交于
      This patch adds the following new interfaces for I/O xAPIC
      hotplug. The implementation of these interfaces depends on each
      architecture.
      
          o int acpi_register_ioapic(acpi_handle handle, u64 phys_addr,
      			       u32 gsi_base);
      
              This new interface is to add a new I/O xAPIC specified by
              phys_addr and gsi_base pair. phys_addr is the physical address
              to which the I/O xAPIC is mapped and gsi_base is global system
              interrupt base of the I/O xAPIC. acpi_register_ioapic returns
              0 on success, or negative value on error.
      
          o int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base);
      
              This new interface is to remove a I/O xAPIC specified by
              gsi_base. acpi_unregister_ioapic returns 0 on success, or
              negative value on error.
      Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      b1bb248a
    • R
      [PATCH] acpi bridge hotadd: Read bridge resources when fixing up the bus · f7d473d9
      Rajesh Shah 提交于
      Read bridge io/mem/pfmem ranges when fixing up the bus so that bus resources
      are tracked.  This is required to properly support pci end device and bridge
      hotplug.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      f7d473d9
    • R
      [PATCH] acpi bridge hotadd: Make pcibios_fixup_bus() hot-plug safe · 71c3511c
      Rajesh Shah 提交于
      PCI scan code calls the arch specific pcibios_fixup_bus() each time it scans a
      new bridge.  For root bridge hot-plug, the bridge and it's attached devices
      may not have been configured properly yet, so it's not safe to claim those
      resources at this time.
      
      This code goes away when we clean up the way pci resources are claimed (in
      pci_enable_device()), so this is only a stopgap fix.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      71c3511c
    • R
      [PATCH] acpi bridge hotadd: Fix pci_enable_device() for p2p bridges · fab3fb0a
      Rajesh Shah 提交于
      When checking if a PCI to PCI bridge should be enabled to decode memory and/or
      IO resources, we need to look at all device resources not just the first 6.
      This is needed to allow PCI bridges to pass down memory and IO accesses to
      child devices even when the bridge itself does not consume resources in its
      PCI BARs.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      fab3fb0a
    • R
      [PATCH] acpi bridge hotadd: ACPI based root bridge hot-add · c431ada4
      Rajesh Shah 提交于
      When you hot-plug a (root) bridge hierarchy, it may have p2p bridges and
      devices attached to it that have not been configured by firmware.  In this
      case, we need to configure the devices before starting them.  This patch
      separates device start from device scan so that we can introduce the
      configuration step in the middle.
      
      I kept the existing semantics for pci_scan_bus() since there are a huge number
      of callers to that function.
      
      Also, I have no way of testing the changes I made to the parisc files, so this
      needs review by those folks.  Sorry for the massive cross-post, this touches
      files in many different places.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      c431ada4
    • J
      [PATCH] PCI Allow OutOfRange PIRQ table address · 120bb424
      jayalk@intworks.biz 提交于
      I updated this to remove unnecessary variable initialization, make
      check_routing be inline only and not __init, switch to strtoul, and
      formatting fixes as per Randy Dunlap's recommendations.
      
      I updated this to change pirq_table_addr to a long, and to add a warning
      msg if the PIRQ table wasn't found at the specified address, as per thread
      with Matthew Wilcox.
      
      In our hardware situation, the BIOS is unable to store or generate it's PIRQ
      table in the F0000h-100000h standard range. This patch adds a pci kernel
      parameter, pirqaddr to allow the bootloader (or BIOS based loader) to inform
      the kernel where the PIRQ table got stored. A beneficial side-effect is that,
      if one's BIOS uses a static address each time for it's PIRQ table, then
      pirqaddr can be used to avoid the $pirq search through that address block each
      time at boot for normal PIRQ BIOSes.
      Signed-off-by: NJaya Kumar <jayalk@intworks.biz>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      120bb424
    • D
      [SPARC64]: Get rid of fast IRQ feature. · 63b61452
      David S. Miller 提交于
      The only real user was the assembler floppy interrupt
      handler, which does not need to be in assembly.
      
      This makes it so that there are less pieces of code which
      know about the internal layout of ivector_table[] and
      friends.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      63b61452
    • D
      [SPARC64]: Avoid membar instructions in delay slots. · b445e26c
      David S. Miller 提交于
      In particular, avoid membar instructions in the delay
      slot of a jmpl instruction.
      
      UltraSPARC-I, II, IIi, and IIe have a bug, documented in
      the UltraSPARC-IIi User's Manual, Appendix K, Erratum 51
      
      The long and short of it is that if the IMU unit misses
      on a branch or jmpl, and there is a store buffer synchronizing
      membar in the delay slot, the chip can stop fetching instructions.
      
      If interrupts are enabled or some other trap is enabled, the
      chip will unwedge itself, but performance will suffer.
      
      We already had a workaround for this bug in a few spots, but
      it's better to have the entire tree sanitized for this rule.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b445e26c
    • K
      [PATCH] kprobes/ia64: refuse kprobe on ivt code · c7b645f9
      Keshavamurthy Anil S 提交于
      Not safe to insert kprobes on IVT code.
      
      This patch checks to see if the address on which Kprobes is being inserted is
      in ivt code and if it is in ivt code then refuse to register kprobe.
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Acked-by: NDavid Mosberger <davidm@napali.hpl.hp.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      c7b645f9
    • R
      [PATCH] kprobes/ia64: refuse inserting kprobe on slot 1 · a528e21c
      Rusty Lynch 提交于
      Without the ability to atomically write 16 bytes, we can not update the
      middle slot of a bundle, slot 1, unless we stop the machine first.  This
      patch will ensure the ability to robustly insert and remove a kprobe by
      refusing to insert a kprobe on slot 1 until a mechanism is in place to
      safely handle this case.
      Signed-off-by: NRusty Lynch <rusty.lynch@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      a528e21c
    • R
      [PATCH] Return probe redesign: ppc64 specific implementation · 97f7943d
      Rusty Lynch 提交于
      The following is a patch provided by Ananth Mavinakayanahalli that implements
      the new PPC64 specific parts of the new function return probe design.
      
      NOTE: Since getting Ananth's patch, I changed trampoline_probe_handler()
            to consume each of the outstanding return probem instances (feedback
            on my original RFC after Ananth cut a patch), and also added the
            arch_init() function (adding arch specific initialization.) I have
            cross compiled but have not testing this on a PPC64 machine.
      
      Changes include:
       * Addition of kretprobe_trampoline to act as a dummy function for instrumented
         functions to return to, and for the return probe infrastructure to place
         a kprobe on on, gaining control so that the return probe handler
         can be called, and so that the instruction pointer can be moved back
         to the original return address.
       * Addition of arch_init(), allowing a kprobe to be registered on
         kretprobe_trampoline
       * Addition of trampoline_probe_handler() which is used as the pre_handler
         for the kprobe inserted on kretprobe_implementation.  This is the function
         that handles the details for calling the return probe handler function
         and returning control back at the original return address
       * Addition of arch_prepare_kretprobe() which is setup as the pre_handler
         for a kprobe registered at the beginning of the target function by
         kernel/kprobes.c so that a return probe instance can be setup when
         a caller enters the target function.  (A return probe instance contains
         all the needed information for trampoline_probe_handler to do it's job.)
       * Hooks added to the exit path of a task so that we can cleanup any left-over
         return probe instances (i.e. if a task dies while inside a targeted function
         then the return probe instance was reserved at the beginning of the function
         but the function never returns so we need to mark the instance as unused.)
      Signed-off-by: NRusty Lynch <rusty.lynch@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      97f7943d
    • R
      [PATCH] Return probe redesign: ia64 specific implementation · 9508dbfe
      Rusty Lynch 提交于
      The following patch implements function return probes for ia64 using
      the revised design.  With this new design we no longer need to do some
      of the odd hacks previous required on the last ia64 return probe port
      that I sent out for comments.
      
      Note that this new implementation still does not resolve the problem noted
      by Keith Owens where backtrace data is lost after a return probe is hit.
      
      Changes include:
       * Addition of kretprobe_trampoline to act as a dummy function for instrumented
         functions to return to, and for the return probe infrastructure to place
         a kprobe on on, gaining control so that the return probe handler
         can be called, and so that the instruction pointer can be moved back
         to the original return address.
       * Addition of arch_init(), allowing a kprobe to be registered on
         kretprobe_trampoline
       * Addition of trampoline_probe_handler() which is used as the pre_handler
         for the kprobe inserted on kretprobe_implementation.  This is the function
         that handles the details for calling the return probe handler function
         and returning control back at the original return address
       * Addition of arch_prepare_kretprobe() which is setup as the pre_handler
         for a kprobe registered at the beginning of the target function by
         kernel/kprobes.c so that a return probe instance can be setup when
         a caller enters the target function.  (A return probe instance contains
         all the needed information for trampoline_probe_handler to do it's job.)
       * Hooks added to the exit path of a task so that we can cleanup any left-over
         return probe instances (i.e. if a task dies while inside a targeted function
         then the return probe instance was reserved at the beginning of the function
         but the function never returns so we need to mark the instance as unused.)
      Signed-off-by: NRusty Lynch <rusty.lynch@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      9508dbfe
    • R
      [PATCH] Return probe redesign: x86_64 specific changes · ba8af12f
      Rusty Lynch 提交于
      The following patch contains the x86_64 specific changes for the new
      return probe design.  Changes include:
       * Removing the architecture specific functions for querying a return probe
         instance off a stack address
       * Complete rework onf arch_prepare_kretprobe() and trampoline_probe_handler()
       * Removing trampoline_post_handler()
       * Adding arch_init() so that now we handle registering the return probe
         trampoline instead of kernel/kprobes.c doing it
      
      NOTE:
      Note that with this new design, the dependency on calculating a pointer to
      the task off the stack pointer no longer exist (resolving the problem of
      interruption stacks as pointed out in the original feedback to this port.)
      Signed-off-by: NRusty Lynch <rusty.lynch@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      ba8af12f
    • R
      [PATCH] Return probe redesign: i386 specific changes · 4bdbd37f
      Rusty Lynch 提交于
      The following patch contains the i386 specific changes for the new
      return probe design.  Changes include:
      
       * Removing the architecture specific functions for querying a return probe
         instance off a stack address
       * Complete rework onf arch_prepare_kretprobe() and trampoline_probe_handler()
       * Removing trampoline_post_handler()
       * Adding arch_init() so that now we handle registering the return probe
         trampoline instead of kernel/kprobes.c doing it
      Signed-off-by: NRusty Lynch <rusty.lynch@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      4bdbd37f
    • A
      [PATCH] kprobes: fix single-step out of line - take2 · 9ec4b1f3
      Ananth N Mavinakayanahalli 提交于
      Now that PPC64 has no-execute support, here is a second try to fix the
      single step out of line during kprobe execution.  Kprobes on x86_64 already
      solved this problem by allocating an executable page and using it as the
      scratch area for stepping out of line.  Reuse that.
      Signed-off-by: NAnanth N Mavinakayanahalli <ananth@in.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      9ec4b1f3
    • A
      [PATCH] seccomp: tsc disable · ffaa8bd6
      Andrea Arcangeli 提交于
      I believe at least for seccomp it's worth to turn off the tsc, not just for
      HT but for the L2 cache too.  So it's up to you, either you turn it off
      completely (which isn't very nice IMHO) or I recommend to apply this below
      patch.
      
      This has been tested successfully on x86-64 against current cogito
      repository (i686 compiles so I didn't bother testing ;).  People selling
      the cpu through cpushare may appreciate this bit for a peace of mind.
      
      There's no way to get any timing info anymore with this applied
      (gettimeofday is forbidden of course).  The seccomp environment is
      completely deterministic so it can't be allowed to get timing info, it has
      to be deterministic so in the future I can enable a computing mode that
      does a parallel computing for each task with server side transparent
      checkpointing and verification that the output is the same from all the 2/3
      seller computers for each task, without the buyer even noticing (for now
      the verification is left to the buyer client side and there's no
      checkpointing, since that would require more kernel changes to track the
      dirty bits but it'll be easy to extend once the basic mode is finished).
      
      Eliminating a cold-cache read of the cr4 global variable will save one
      cacheline during the tlb flush while making the code per-cpu-safe at the
      same time.  Thanks to Mikael Pettersson for noticing the tlb flush wasn't
      per-cpu-safe.
      
      The global tlb flush can run from irq (IPI calling do_flush_tlb_all) but
      it'll be transparent to the switch_to code since the IPI won't make any
      change to the cr4 contents from the point of view of the interrupted code
      and since it's now all per-cpu stuff, it will not race.  So no need to
      disable irqs in switch_to slow path.
      Signed-off-by: NAndrea Arcangeli <andrea@cpushare.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      ffaa8bd6
    • B
      [PATCH] ppc64: Add missing exports · 6ae3db11
      Benjamin Herrenschmidt 提交于
      This patch adds a couple of missing symbol exports.  flush_dcache_page is
      used by the AGP driver and rtc_lock by the RTC driver.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NNick Piggin <nickpiggin@yahoo.com.au>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      6ae3db11
    • B
      [PATCH] ppc32: Remove CONFIG_PMAC_PBOOK · 8c870933
      Benjamin Herrenschmidt 提交于
      This patch removes CONFIG_PMAC_PBOOK (PowerBook support).  This is now
      split into CONFIG_PMAC_MEDIABAY for the actual hotswap bay that some
      powerbooks have, CONFIG_PM for power management related code, and just left
      out of any CONFIG_* option for some generally useful stuff that can be used
      on non-laptops as well.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      8c870933