1. 30 4月, 2007 1 次提交
  2. 24 4月, 2007 1 次提交
  3. 14 2月, 2007 2 次提交
  4. 04 12月, 2006 1 次提交
    • M
      [POWERPC] cell: Add oprofile support · 18f2190d
      Maynard Johnson 提交于
      Add PPU event-based and cycle-based profiling support to Oprofile for Cell.
      
      Oprofile is expected to collect data on all CPUs simultaneously.
      However, there is one set of performance counters per node.  There are
      two hardware threads or virtual CPUs on each node.  Hence, OProfile must
      multiplex in time the performance counter collection on the two virtual
      CPUs.
      
      The multiplexing of the performance counters is done by a virtual
      counter routine.  Initially, the counters are configured to collect data
      on the even CPUs in the system, one CPU per node.  In order to capture
      the PC for the virtual CPU when the performance counter interrupt occurs
      (the specified number of events between samples has occurred), the even
      processors are configured to handle the performance counter interrupts
      for their node.  The virtual counter routine is called via a kernel
      timer after the virtual sample time.  The routine stops the counters,
      saves the current counts, loads the last counts for the other virtual
      CPU on the node, sets interrupts to be handled by the other virtual CPU
      and restarts the counters, the virtual timer routine is scheduled to run
      again.  The virtual sample time is kept relatively small to make sure
      sampling occurs on both CPUs on the node with a relatively small
      granularity.  Whenever the counters overflow, the performance counter
      interrupt is called to collect the PC for the CPU where data is being
      collected.
      
      The oprofile driver relies on a firmware RTAS call to setup the debug bus
      to route the desired signals to the performance counter hardware to be
      counted.  The RTAS call must set the routing registers appropriately in
      each of the islands to pass the signals down the debug bus as well as
      routing the signals from a particular island onto the bus.  There is a
      second firmware RTAS call to reset the debug bus to the non pass thru
      state when the counters are not in use.
      Signed-off-by: NCarl Love <carll@us.ibm.com>
      Signed-off-by: NMaynard Johnson <mpjohn@us.ibm.com>
      Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      18f2190d