- 21 12月, 2013 12 次提交
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由 Tomasz Figa 提交于
For consistency with other device tree nodes, this patch adds missing spaces after node labels. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
There is no need to use two cells for interrupt specifiers inside the MCT interrupt map, so this patch simplifies the map to use one cell. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
For MCT block compatible with "samsung,exynos4412-mct", that uses PPI interrupts for local timers, only one local interrupt needs to be specified, since it is a per-processor interrupt. This allows moving MCT node of Exynos4x12 SoCs back to common exynos4x12.dtsi, since they have the same set of interrupts to be specified, which was the only difference. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
MCT is not an interrupt controller and so there is no point for device tree nodes representing it to contain interrupt-controller and #interrupt-cells properties. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Leela Krishna Amudala 提交于
Add the device-tree binding for the PWM controller to Exynos5250 and Exynos5420 Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Signed-off-by: NOlof Johansson <olofj@chromium.org> Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Leela Krishna Amudala 提交于
Add SPI device tree nodes to Exynos5420 SoC Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: NAndrew Bresticker <abrestic@chromium.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Padmavathi Venna 提交于
This patch adds dma controller node info on Exynos5420. Exynos5420 has adma for audio IPs. As adma clk is dependent on audss clk provider that will be added later. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
This patch removes device tree node of SDHCI0 controller and replaces it with MSHC to enable support MMC 4.4 and improve performance of eMMC memory. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
All SoCs from Exynos4x12 series contain the MSHC block, so its node can be located in exynos4x12.dtsi. In addition, missing clock specifiers are added, generic SoC attributes are moved from board dts files to common dtsi file of SoC family and the node is renamed to a more generic name to follow node naming recommendations. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Seungwon Jeon 提交于
Clock lookup information is required as driver can manipulate clock rate properly. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Doug Anderson 提交于
The device tree sent upstream for exynos5250-snow encoded the search key as CAPSLK. However in all ChromeOS kernels it is L_META. One can certainly have long debates about which it ought to be, but I'm proposing setting it to L_META because: * That's how _all_ ChromeOS kernels do it and will do it. * There is no L_META key on the board, so it's nice to have. * For those people who really want it to be caps lock, they can use xmodmap or somesuch. Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Doug Anderson 提交于
When the exynos5250 device tree was sent upstream the keyboard mapping was missing the 2nd instance of the "\" key. There are two copies of the "\" because it simply has a different row and column on US and non-US keyboards. For more details, see the previous patch in this series: (mkbp: Fix problems with backslash). Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 16 12月, 2013 12 次提交
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由 Sachin Kamat 提交于
Fix the name as per DT node naming convention. - rename the node to syscon which is a more generic name. - append the register value to the node name. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sachin Kamat 提交于
Added high speed I2C nodes to Exynos5420 DT file. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sachin Kamat 提交于
The minimum recommended ARM voltage for Exynos5250 at 200MHz on Arndale board is 0.9125V. Update accordingly. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chander Kashyap 提交于
Exynos5420 is octa-core SoC from Samsung. Hence populate all the CPU node entries. Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chander Kashyap 提交于
Exynos5420 is octa-core SoC from Samsung. Hence extend exynos-mct clocksource driver to support 8 local interrupts. Also extend dts entries for 8 interrupts. Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Leela Krishna Amudala 提交于
Adds G-Scaler device nodes to the DT device list Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Yuvaraj Kumar C D 提交于
This patch adds the mmc device tree node entries for exynos5420 SOC. Exynos5420 has a different version of DWMMC controller,so a new compatible string is used to distinguish it from the prior SOC's. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Yuvaraj Kumar C D 提交于
This patch rename's the device tree mmc node's from "dwmmc" to "mmc". According to ePAPR chapter 2.2.2 generic node name recommendation, it has been opted change from dwmmc to mmc.Also this patch remove the instance index from the node name. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Yuvaraj Kumar C D 提交于
As fifo-depth property in dw_mmc device tree node is SOC specific, move this property to exynos5250 SOC specific file. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> [kgene.kim@samsung.com: squashed fifo-depth patch for cros5250-common] Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sachin Kamat 提交于
As per the timing information for supported panel, the value should be between 47.2 MHz to 47.9 MHz for 60Hz refresh rate. Total horizontal pixels = 1024 (x-res) + 80 (margin) + 48 (hsync) = 1152 Total vertical pixels = 600 (y-res) + 80 (margin) + 3 (vsync) = 683 Target pixel clock rate for refresh rate @60 Hz = 1152 * 683 * 60 = 47208960 Hz ~ 47.5 MHz Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tushar Behera 提交于
As per the timing information for supported panel, the value should be between 47.2 MHz to 47.9 MHz for 60Hz refresh rate. Total horizontal pixels = 1024 (x-res) + 80 (margin) + 48 (hsync) = 1152 Total vertical pixels = 600 (y-res) + 80 (margin) + 3 (vsync) = 683 Target pixel clock rate for refresh rate @60 Hz = 1152 * 683 * 60 = 47208960 Hz ~ 47.5 MHz Signed-off-by: NTushar Behera <tushar.behera@linaro.org> Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Yuvaraj Kumar C D 提交于
According to ePAPR, chapter 2.3.4, the status property has defined that it should be set to "disabled" when "the device is not presently operational, but it might become operational in the future". So this patch disable dwmmc node by "status = disabled" in SOC dts file and enable dwmmc node by "status = okay" in board specific dts file. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 12 12月, 2013 3 次提交
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由 Sachin Kamat 提交于
Fixed samaung -> samsung in property name. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sachin Kamat 提交于
Added missing clock frequency property to CPU node to avoid boot time warnings. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Sachin Kamat 提交于
Though the default value is 1, add it explicitly to avoid unnecessary boot warnings and for consistency. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 02 12月, 2013 1 次提交
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由 Yuvaraj Kumar C D 提交于
Exynos5 series SOC's 5250 and 5420 have different versions of DWMMC controller.So there is a new compatible string to distinguish between them.So these nodes should be moved out of Exynos5 series common device tree source to SOC specific device tree source. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 13 11月, 2013 1 次提交
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由 NeilBrown 提交于
This allows the charger to be enabled with devicetree, and allows the parameters for charging the backup battery to be set. Signed-off-by: NNeilBrown <neilb@suse.de> Acked-by: NKumar Gala <galak@codeaurora.org> Acked-by: NGrant Likely <grant.likely@linaro.org> Signed-off-by: NAnton Vorontsov <anton@enomsg.org>
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- 11 11月, 2013 3 次提交
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由 Alexander Shiyan 提交于
Proper clock ID for USB OTG PHY is "usb_phy_gate". The patch changes this mismatch. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Felipe Balbi 提交于
Add missing nodes for the touchscreen available on AM335x EVM SK. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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由 Felipe Balbi 提交于
There was a spelling mistake on TSC/ADC binding where "coordinate" was spelled as "coordiante". We can't simply fix the error due to DT being an ABI, the approach taken was to first use correct spelling and if that fails, fall back to miss-spelled version. It's unfortunate that has creeped into the tree. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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- 05 11月, 2013 1 次提交
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由 Rob Herring 提交于
The DDR controller is slightly different in ECX-2000 and ECX-1000, so we need to have different nodes for each platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> [Device Tree documentation updated.] Signed-off-by: NRobert Richter <rric@kernel.org>
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- 04 11月, 2013 1 次提交
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由 Grant Likely 提交于
Commit 23616132, "of/irq: Refactor interrupt-map parsing" introduced a bug. The irq parsing will fail for some nodes that don't have a reg property. It is fixed by deferring the check for reg until it is actually needed. Also adjust the testcase data to catch the bug. Signed-off-by: NGrant Likely <grant.likely@linaro.org> Tested-by: NStephen Warren <swarren@nvidia.com> Tested-by: NMing Lei <tom.leiming@gmail.com> Tested-by: NStephen Warren <swarren@nvidia.com> Cc: Rob Herring <rob.herring@calxeda.com>
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- 01 11月, 2013 5 次提交
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由 Matt Porter 提交于
Trivial patch to make use of GIC/IRQ defines on the bcm11351 sdio interrupt properties. Signed-off-by: NMatt Porter <matt.porter@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Tim Kryger 提交于
This adds in three more UARTs that were not declared earlier. Signed-off-by: NTim Kryger <tim.kryger@linaro.org> Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Markus Mayer 提交于
Register GPIO 14 as card detect interrupt for the SD card slot. Signed-off-by: NMarkus Mayer <markus.mayer@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Christian Daudt 提交于
Currently ARCH_BCM has been used for Broadcom Mobile V7 based SoCs. In order to allow other Broadcom SoCs to also use mach-bcm directory and files, this patch renames the original ARCH_BCM to ARCH_BCM_MOBILE, and uses ARCH_BCM to define any Broadcom chip residing in mach-bcm directory. Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Markus Mayer 提交于
Add the GPIO controller device node for the Broadcom bcm281xx family of mobile SoCs. Signed-off-by: NMarkus Mayer <markus.mayer@linaro.org> Reviewed-by: NTim Kryger <tim.kryger@linaro.org> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NChristian Daudt <bcm@fixthebug.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 31 10月, 2013 1 次提交
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由 Arnaud Ebalard 提交于
Main hardware parts of the (Armada 370 based) NETGEAR ReadyNAS 104 are supported by mainline kernel (USB 3.0 rear ports, USB 2.0 front port, Gigabit controller and PHYs, serial port, LEDs, buttons, SATA ports, G762 fan controller) and referenced in provided .dts file. Some additonal work remains for: - Intersil ISL12057 I2C RTC and Alarm chip: working driver but needs to be splitted for submission of RTC part first; - Front LCD (Winstar 1602G): driver needs to be written - Armada NAND controller (to access onboard 128MB of NAND): support being pushed by @free-electrons people - 4 front SATA LEDs controlled via GPIO brought by NXP PCA9554: driver is available upstream. Not referenced/tested yet. but the device is usable w/o those. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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